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1.发明公开Complementary metal oxide semiconductor device and method of manufacturing the same 有权Bauelement mitkomplementäremMetalloxid-Halbleiter und Verfahren zur Herstellung davon
公开(公告)号：EP2846353A3
公开(公告)日：2015-08-12
申请号：EP14183431.7
申请日：2014-09-03
发明人： Yang, Moon-seung , Uddin, Mohammad Rakib , Le, Myoung-jae , Lee, Sang-moon , Lee, Sung-hun , Cho, Seong-ho
IPC分类号： H01L21/8252 , H01L21/8258 , H01L27/06 , H01L21/8238 , H01L27/092
CPC分类号： H01L21/8238 , H01L21/8252 , H01L21/8258 , H01L27/0605 , H01L27/092
摘要： Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.
摘要翻译： 提供了互补金属氧化物半导体（CMOS）器件及其制造方法。 在CMOS器件中，在硅衬底上设置缓冲层，并且在缓冲层上设置包括III-V族材料的第一层。 包含IV族材料的第二层在与第一层间隔开的同时设置在缓冲层或硅衬底上。
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公开(公告)号：EP2187453A2
公开(公告)日：2010-05-19
申请号：EP09175236.0
申请日：2009-11-06
发明人： Chae, Su-hee , Jeong, Hyung-su , Yang, Moon-seung , Kim, Taek , Kim, Jun-youn , Park, Jae-chul , Kim, Kyoung-kook , Park, Young-soo
CPC分类号： H01L33/0079 , H01L33/12
摘要： Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer (33) formed of a metal between a semiconductor layer (20) and a bonding substrate (31). When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.
摘要翻译： 本发明提供一种使用晶片接合方法制造的发光二极管（LED）以及使用晶片接合方法制造LED的方法。 晶片键合方法可以包括在半导体层（20）和键合衬底（31）之间插入由金属形成的应力缓和层（33）。 当使用应力松弛层时，由于金属的柔性，接合衬底与生长衬底之间的应力可能被抵消，因此，可以减小或防止接合衬底的弯曲或翘曲。
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公开(公告)号：EP2704184B1
公开(公告)日：2019-06-19
申请号：EP13182592.9
申请日：2013-09-02
发明人： Kim, Jun-youn , Kim, Joo-sung , Yang, Moon-seung
IPC分类号： H01L21/20
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公开(公告)号：EP2843706B1
公开(公告)日：2019-03-06
申请号：EP14178402.5
申请日：2014-07-24
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公开(公告)号：EP2843706A3
公开(公告)日：2016-02-24
申请号：EP14178402.5
申请日：2014-07-24
发明人： Lee, Dong-soo , Lee, Myoung-jae , Cho, Seong-ho , Uddin, Mohammad Rakib , Seo, David , Yang, Moon-seung , Lee, Sang-moon , Lee, Sung-hun , Hur, Ji-hyun , Hwang, Eui-chul
CPC分类号： H01L29/34 , H01L21/02175 , H01L21/02189 , H01L21/02192 , H01L21/022 , H01L21/02304 , H01L21/28158 , H01L21/28264 , H01L21/322 , H01L21/3228 , H01L29/20 , H01L29/2003 , H01L29/24 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66522 , H01L29/7851
摘要： The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
摘要翻译： 本公开涉及在III-V族化合物半导体层和介电层之间包括氧吸收层的半导体器件以及制造该半导体器件的方法。 该半导体器件可以包括化合物半导体层; 设置在所述化合物半导体层上的介电层; 以及置于化合物半导体层和介电层之间的氧吸收层。 氧吸除层包括具有比化合物半导体层的材料更高的氧亲和力的材料。
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6.发明公开Semiconductor device and method of fabricating the same 审中-公开Halbleiterbauelement und Herstellungsverfahrendafür
公开(公告)号：EP2843706A2
公开(公告)日：2015-03-04
申请号：EP14178402.5
申请日：2014-07-24
发明人： Lee, Dong-soo , Lee, Myoung-jae , Cho, Seong-ho , Uddin, Mohammad Rakib , Seo, David , Yang, Moon-seung , Lee, Sang-moon , Lee, Sung-hun , Hur, Ji-hyun , Hwang, Eui-chul
CPC分类号： H01L29/34 , H01L21/02175 , H01L21/02189 , H01L21/02192 , H01L21/022 , H01L21/02304 , H01L21/28158 , H01L21/28264 , H01L21/322 , H01L21/3228 , H01L29/20 , H01L29/2003 , H01L29/24 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66522 , H01L29/7851
摘要： The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
摘要翻译： 本发明涉及包括III-V族化合物半导体层和电介质层之间的吸氧层的半导体器件，以及制造半导体器件的方法。 半导体器件可以包括化合物半导体层; 设置在化合物半导体层上的电介质层; 以及介于化合物半导体层和电介质层之间的吸氧层。 吸氧层包括具有比化合物半导体层的材料更高的氧亲合力的材料。
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公开(公告)号：EP2187453A3
公开(公告)日：2011-05-25
申请号：EP09175236.0
申请日：2009-11-06
发明人： Chae, Su-hee , Jeong, Hyung-su , Yang, Moon-seung , Kim, Taek , Kim, Jun-youn , Park, Jae-chul , Kim, Kyoung-kook , Park, Young-soo
CPC分类号： H01L33/0079 , H01L33/12
摘要： Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer (33) formed of a metal between a semiconductor layer (20) and a bonding substrate (31). When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.
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8.发明授权
公开(公告)号：EP2846353B1
公开(公告)日：2017-11-01
申请号：EP14183431.7
申请日：2014-09-03
发明人： Yang, Moon-seung , Uddin, Mohammad Rakib , Le, Myoung-jae , Lee, Sang-moon , Lee, Sung-hun , Cho, Seong-ho
IPC分类号： H01L21/8252 , H01L21/8258 , H01L27/06 , H01L21/8238 , H01L27/092
CPC分类号： H01L21/8238 , H01L21/8252 , H01L21/8258 , H01L27/0605 , H01L27/092
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9.发明公开Complementary metal oxide semiconductor device and method of manufacturing the same 有权互补金属氧化物半导体器件及其制造方法
公开(公告)号：EP2846353A2
公开(公告)日：2015-03-11
申请号：EP14183431.7
申请日：2014-09-03
发明人： Yang, Moon-seung , Uddin, Mohammad Rakib , Le, Myoung-jae , Lee, Sang-moon , Lee, Sung-hun , Cho, Seong-ho
IPC分类号： H01L21/8252 , H01L21/8258 , H01L27/06
CPC分类号： H01L21/8238 , H01L21/8252 , H01L21/8258 , H01L27/0605 , H01L27/092
摘要： Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.
摘要翻译： 提供了一种互补金属氧化物半导体（CMOS）器件及其制造方法。 在CMOS器件中，缓冲层设置在硅衬底上，并且包括III-V族材料的第一层设置在缓冲层上。 包括IV族材料的第二层设置在缓冲层或硅衬底上，同时与第一层间隔开。
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10.发明公开Semiconductor buffer structure, semiconductor device including the same, and manufacturing method thereof 审中-公开Halbleiterpufferstruktur，Halbleitervorrichtung damit und Herstellungsverfahrendafür
公开(公告)号：EP2704184A1
公开(公告)日：2014-03-05
申请号：EP13182592.9
申请日：2013-09-02
发明人： Kim, Jun-youn , Kim, Joo-sung , Yang, Moon-seung
IPC分类号： H01L21/20
CPC分类号： H01L29/2003 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L29/267
摘要： A semiconductor structure including a first nitride semiconductor layer, a second nitride semiconductor layer, and a third layer between the first nitride semiconductor layer and the second nitride semiconductor layer. The first nitride semiconductor layer has a first gallium composition ratio, the second nitride semiconductor layer has a second gallium composition ratio different from the first metal composition ratio, and the third layer has a third gallium composition ratio greater than at least one of the first gallium composition ratio or the second gallium composition ratio. The structure may also include a fourth layer for reducing tensile stress or increasing compression stress experienced by at least the second nitride semiconductor layer.
摘要翻译： 一种在第一氮化物半导体层和第二氮化物半导体层之间包括第一氮化物半导体层，第二氮化物半导体层和第三层的半导体结构。 第一氮化物半导体层具有第一镓组成比，第二氮化物半导体层具有与第一金属组成比不同的第二镓组成比，并且第三层具有大于第一镓的至少一种的第三镓组成比 组成比或第二镓组成比。 该结构还可以包括用于降低至少第二氮化物半导体层所经历的拉伸应力或增加压缩应力的第四层。
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