DECODING CIRCUIT FOR NON-BINARY GROUPS OF MEMORY LINE DRIVERS
    8.
    发明公开
    DECODING CIRCUIT FOR NON-BINARY GROUPS OF MEMORY LINE DRIVERS 审中-公开
    译码电路为内存行司机非二进制组

    公开(公告)号:EP1869679A2

    公开(公告)日:2007-12-26

    申请号:EP06720714.2

    申请日:2006-02-14

    申请人: Sandisk 3D LLC

    IPC分类号: G11C11/34

    摘要: A decoding circuit for non-binary groups of memory line drivers is disclosed. In one embodiment, an integrated circuit is disclosed comprising a binary decoder and circuitry operative to perform a non-binary arithmetic operation, wherein a result of the non-binary arithmetic operation is provided as input to the binary decoder. In another embodiment, an integrated circuit is disclosed comprising a memory array comprising a plurality of array lines, a non-integral-power-of-two number of array line driver circuits, and control circuitry configured to select one of the array line driver circuits. The control circuitry can comprise a binary decoder and a pre-decoder portion that performs a non-binary arithmetic operation. The concepts described herein may be used alone or in combination.

    NON-VOLATILE MEMORY ARRAYS COMPRISING RAIL STACKS WITH A SHARED DIODE COMPONENT PORTION FOR DIODES OF ELECTRICALLY ISOLATED PILLARS
    10.
    发明公开
    NON-VOLATILE MEMORY ARRAYS COMPRISING RAIL STACKS WITH A SHARED DIODE COMPONENT PORTION FOR DIODES OF ELECTRICALLY ISOLATED PILLARS 审中-公开
    不具有轨易失性存储器阵列,共享使用二极管组成部分FOR二极管电位隔离矿柱STACKS

    公开(公告)号:EP2286453A1

    公开(公告)日:2011-02-23

    申请号:EP09763292.1

    申请日:2009-06-02

    申请人: Sandisk 3D LLC

    IPC分类号: H01L27/102

    CPC分类号: H01L27/1021

    摘要: An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. Two- terminal devices such as passive element memory cells can include a diode steering element in series with an antifuse and/or other state change element. The devices are formed using pillar structures at the intersections of upper and lower sets of conductors. The height of the pillar structures are reduced by forming part of the diode for each pillar in a rail stack with one of the conductors. A diode in one embodiment can include a first diode component of a first conductivity type and a second diode component of a second conductivity type. A portion of one of the diode components is divided into first and second portions with one on the portions being formed in the rail stack where it is shared with other diodes formed using pillars at the rail stack.