PROGRAMMING NON-VOLATILE MEMORY
    2.
    发明授权
    PROGRAMMING NON-VOLATILE MEMORY 有权
    编程非易失性存储器

    公开(公告)号:EP1711950B1

    公开(公告)日:2007-12-19

    申请号:EP05705363.9

    申请日:2005-01-10

    IPC分类号: G11C16/34 G11C11/56

    摘要: One or more programming operations are performed on a set of non-volatile storage elements. For example, the programming operations may include applying a set of programming pulses. A verify process is performed to determine which of the non-volatile storage element have reached an intermediate verify threshold but have not reached a final verify threshold. One additional programming operation at a reduced level is performed for the non-volatile storage elements that have reached the intermediate verify threshold but have not reached the final verify threshold, and those non-volatile storage elements are then inhibited from further programming. Non-volatile storage elements that have not reached the intermediate verify threshold continue programming. Non-volatile storage elements that reach the final verify threshold are inhibited from programming.

    COMPENSATING FOR COUPLING BETWEEN ADJACENT STORAGE ELEMENTS IN A NONVOLATILE MEMORY, BASED ON SENSING A NEIGHBOR USING COUPLING
    4.
    发明授权
    COMPENSATING FOR COUPLING BETWEEN ADJACENT STORAGE ELEMENTS IN A NONVOLATILE MEMORY, BASED ON SENSING A NEIGHBOR USING COUPLING 有权
    补偿用于联接之间。在非易失性存储器相邻的存储元素对进样PAIRING NEIGHBORS的基础

    公开(公告)号:EP2047473B1

    公开(公告)日:2011-08-31

    申请号:EP07799656.9

    申请日:2007-07-18

    发明人: FONG, Yupin LI, Yan

    IPC分类号: G11C11/56

    摘要: Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).

    COMPENSATING FOR COUPLING BETWEEN ADJACENT STORAGE ELEMENTS IN A NONVOLATILE MEMORY, BASED ON SENSING A NEIGHBOR USING COUPLING
    5.
    发明公开
    COMPENSATING FOR COUPLING BETWEEN ADJACENT STORAGE ELEMENTS IN A NONVOLATILE MEMORY, BASED ON SENSING A NEIGHBOR USING COUPLING 有权
    补偿用于联接之间。在非易失性存储器相邻的存储元素对进样PAIRING NEIGHBORS的基础

    公开(公告)号:EP2047473A2

    公开(公告)日:2009-04-15

    申请号:EP07799656.9

    申请日:2007-07-18

    发明人: FONG, Yupin LI, Yan

    IPC分类号: G11C11/56

    摘要: Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).

    PROGRAMMING NON-VOLATILE MEMORY
    6.
    发明公开
    PROGRAMMING NON-VOLATILE MEMORY 有权
    编程非易失性存储器

    公开(公告)号:EP1711950A1

    公开(公告)日:2006-10-18

    申请号:EP05705363.9

    申请日:2005-01-10

    IPC分类号: G11C16/34 G11C11/56

    摘要: One or more programming operations are performed on a set of non-volatile storage elements. For example, the programming operations may include applying a set of programming pulses. A verify process is performed to determine which of the non-volatile storage element have reached an intermediate verify threshold but have not reached a final verify threshold. One additional programming operation at a reduced level is performed for the non-volatile storage elements that have reached the intermediate verify threshold but have not reached the final verify threshold, and those non-volatile storage elements are then inhibited from further programming. Non-volatile storage elements that have not reached the intermediate verify threshold continue programming. Non-volatile storage elements that reach the final verify threshold are inhibited from programming.

    INTELLIGENT CONTROL OF PROGRAM PULSE DURATION
    7.
    发明公开
    INTELLIGENT CONTROL OF PROGRAM PULSE DURATION 审中-公开
    智能控制程序WIDTH

    公开(公告)号:EP2160735A1

    公开(公告)日:2010-03-10

    申请号:EP08771368.1

    申请日:2008-06-18

    发明人: FONG, Yupin WAN, Jun

    IPC分类号: G11C16/34 G11C16/10

    摘要: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have a constant pulse width and increasing magnitudes until a maximum voltage is reached. At that point, the magnitude of the programming pulses stops increasing and the programming pulses are applied in a manner to provide varying time duration of the programming signal between verification operations. In one embodiment, for example, after the pulses reach the maximum magnitude the pulse widths are increased. In another embodiment, after the pulses reach the maximum magnitude multiple program pulses are applied between verification operations.

    DEEP WORDLINE TRENCH TO SHIELD CROSS COUPLING BETWEEN ADJACENT CELLS FOR SCALED NAND
    10.
    发明公开
    DEEP WORDLINE TRENCH TO SHIELD CROSS COUPLING BETWEEN ADJACENT CELLS FOR SCALED NAND 有权
    深WORTLEITUNSGGRABEN有关暴露于交叉耦合之间的NAND存储器相邻小区

    公开(公告)号:EP1514309A1

    公开(公告)日:2005-03-16

    申请号:EP03736962.6

    申请日:2003-06-09

    IPC分类号: H01L27/115 H01L21/8247

    CPC分类号: H01L27/11524 G11C16/0483

    摘要: A NAND flash memory structure with a wordline or control gate that provides shielding from Yupin effect errors and generally from potentials in adjacent strings of transistors undergoing programming operations with significant variations in potential. Each string has a first select gate (105), a plurality of floating gates (102), and a second select gate. The floating gates are formed between shallow trench isolation areas (104) and wordlines (106) extend across adjacent strings and extend between the floating gates into the shallow trench isolation areas thereby shielding the floating gates from variations in potential of adjacent memory cells.