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公开(公告)号:EP3549169A1
公开(公告)日:2019-10-09
申请号:EP17809056.9
申请日:2017-11-15
发明人: TANAKA, Akira , OTAKE, Yusuke , WAKANO, Toshifumi
IPC分类号: H01L27/146 , H01L31/107
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公开(公告)号:EP3545559A1
公开(公告)日:2019-10-02
申请号:EP18772919.9
申请日:2018-09-03
发明人: ITO, Kyosuke , WAKANO, Toshifumi , OTAKE, Yusuke
IPC分类号: H01L31/0352 , H01L31/107
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公开(公告)号:EP4459679A2
公开(公告)日:2024-11-06
申请号:EP24200051.1
申请日:2017-10-18
发明人: OTAKE, Yusuke , MATSUMOTO, Akira , YAMAMOTO, Junpei , NAITO, Ryusei , NAKAMIZO, Masahiko , WAKANO, Toshifumi
IPC分类号: H01L27/146
摘要: A sensor, comprising a first substrate (41) including a first semiconductor layer (310) including a first avalanche photodiode (21) including a first cathode region (101) and a first anode region (105); and a first isolation region (108), a first wiring layer (41, 311) including a first wiring; a first via (104), wherein the first cathode region (101) is electrically connected to the first wiring through the first via (104); a second wiring; and a second via (106), wherein the first anode region (105) is electrically connected to the second wiring through the second via (106); and a second substrate (42) stacked on the first substrate, the second substrate including a second wiring layer (42, 610) including a third wiring directly bonded to the first wiring; and a fourth wiring directly bonded to the second wiring; and a second semiconductor layer (610), wherein the first anode region (105) is disposed between the first cathode region (101) and the first isolation region (108).
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公开(公告)号:EP4141939A1
公开(公告)日:2023-03-01
申请号:EP21792391.1
申请日:2021-01-29
发明人: OTAKE, Yusuke , WAKANO, Toshifumi
IPC分类号: H01L27/146 , G01C3/08 , H01L21/3205 , H01L21/768 , H01L23/522 , H01L27/144 , H01L31/107 , H04N5/369
摘要: To improve sensitivity to near-infrared light and suppress deterioration of timing jitter characteristics. A photodetector includes: a pixel region in which a plurality of pixels each having a photoelectric converter is arranged in a matrix, in which the photoelectric converter includes: a first semiconductor portion segmented by a separator; a second semiconductor portion provided on a side of a first face of the first semiconductor portion, the first face being opposite to a second face of the first semiconductor portion, the second semiconductor portion containing germanium; a light absorber with which the second semiconductor portion is provided, the light absorber being configured to absorb light having entered the second semiconductor portion to generate a carrier; and a multiplier with which the first semiconductor portion is provided, the multiplier being configured to avalanche-multiply the carrier generated by the light absorber.
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公开(公告)号:EP4398592A1
公开(公告)日:2024-07-10
申请号:EP22864004.1
申请日:2022-06-17
发明人: YANAGIDA, Masaaki , YONEDA, Kazuhiro , KOMOTO, Takeyoshi , ITO, Kyosuke , OTAKE, Yusuke , MORI, Junji , WAKANO, Toshifumi , HINAMOTO, Tatsuki , YAGI, Shinichiro
IPC分类号: H04N23/12 , H01L27/146 , H04N25/70 , H04N25/77
CPC分类号: H01L27/146
摘要: An imaging device according to an embodiment of the present disclosure includes: a plurality of pixel blocks each including a plurality of light-receiving pixels including color filters of same color, the plurality of light-receiving pixels being divided into a plurality of first pixel pairs each including two light-receiving pixels adjacent to each other in a first direction; a plurality of lenses provided at respective positions corresponding to the plurality of first pixel pairs; and a plurality of floating diffusion layers each disposed at a boundary between the two light-receiving pixels, of the plurality of first pixel pairs, adjacent to each other in the first direction, the plurality of floating diffusion layers each shared in the plurality of first pixel pairs.
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公开(公告)号:EP4254502A3
公开(公告)日:2024-01-10
申请号:EP23188095.6
申请日:2018-07-25
IPC分类号: H01L27/146
摘要: The disclosure pertains to a light detecting device that includes: a first pixel (21) and a second pixel (21), wherein the first pixel (21) includes a first semiconductor region (31) and a second semiconductor region (32), and the second pixel (21) includes a third semiconductor region (31) and a fourth semiconductor region (32); and a first wiring layer (23) that includes: a first electrode (37), a first via (38) coupled to the first electrode (37) and the first semiconductor region (31), and a second via (38) coupled to the first electrode (37) and the third semiconductor region (31); wherein a conductivity type of the first semiconductor region (31) is opposite to a conductivity type of the second semiconductor region (32).
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公开(公告)号:EP4254502A2
公开(公告)日:2023-10-04
申请号:EP23188095.6
申请日:2018-07-25
IPC分类号: H01L27/146
摘要: The disclosure pertains to a light detecting device that includes: a first pixel (21) and a second pixel (21), wherein the first pixel (21) includes a first semiconductor region (31) and a second semiconductor region (32), and the second pixel (21) includes a third semiconductor region (31) and a fourth semiconductor region (32); and a first wiring layer (23) that includes: a first electrode (37), a first via (38) coupled to the first electrode (37) and the first semiconductor region (31), and a second via (38) coupled to the first electrode (37) and the third semiconductor region (31); wherein a conductivity type of the first semiconductor region (31) is opposite to a conductivity type of the second semiconductor region (32).
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公开(公告)号:EP4018220A1
公开(公告)日:2022-06-29
申请号:EP20761642.6
申请日:2020-08-07
发明人: OTAKE, Yusuke , WAKANO, Toshifumi
IPC分类号: G01S7/4863 , G01S17/894 , H01L27/146 , H04N5/378
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公开(公告)号:EP3955301A1
公开(公告)日:2022-02-16
申请号:EP20788366.1
申请日:2020-03-16
发明人: YAGI, Shinichiro , OTAKE, Yusuke , ITO, Kyosuke
IPC分类号: H01L27/146 , H01L31/107 , H04N5/369
摘要: Provided are a sensor chip and an electronic device for which the enhancement of the characteristics of SPAD pixels each including an avalanche photodiode element has been achieved. The sensor chip includes a pixel array section including a pixel area in which a plurality of pixels is arranged in rows and columns, an avalanche photodiode element that amplifies a carrier by a high electric field area provided for the each of the pixels, an inter-pixel separation section that insulates and separates the each of the pixels from another pixel adjacent to the each of the pixels in a semiconductor substrate in which the avalanche photodiode element is formed, and a wiring that is arranged in a wiring layer laminated on a surface being opposite to a light receiving surface of the semiconductor substrate in such a way as to cover at least the high electric field area. The pixel array section includes a dummy pixel area located near a peripheral edge of the pixel area, and a cathode electric potential and an anode electric potential of the avalanche photodiode element that is arranged in the dummy pixel area are a same electric potential, or at least one of the cathode electric potential and the anode electric potential is in a floating state.
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公开(公告)号:EP4447115A1
公开(公告)日:2024-10-16
申请号:EP22903954.0
申请日:2022-11-09
IPC分类号: H01L27/146 , H04N25/76 , H04N25/778
摘要: The present technology provides a photodetection device in which an increase in capacitance of charge accumulation regions is prevented. The photodetection device includes: a first semiconductor layer; a first wiring layer; a second wiring layer; and a second semiconductor layer, the first semiconductor layer including: a cell region in which a photoelectric conversion element is formed; a charge storage region; and a transfer transistor, the first wiring layer including a first wiring line group and a second wiring line group stacked on the first wiring line group via an insulating film, the first wiring line group being the wiring line group located closest to the first semiconductor layer, the first wiring line group including a first pad, a reference potential line, and a gate control line that are provided at intervals in a horizontal direction, the second wiring line group including a second pad electrically connected to the first pad, the first wiring layer including: a first via having one end connected to the charge accumulation region and the other end connected to the first pad; a second via having one end connected to the cell region and the other end connected to the reference potential line; and a third via having one end connected to the gate electrode of the transfer transistor and the other end connected to the gate control line.
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