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公开(公告)号:EP1387401A3
公开(公告)日:2008-12-10
申请号:EP03017445.2
申请日:1997-10-27
发明人: Siniaguine, Oleg
IPC分类号: H01L21/44 , H01L21/56 , H01L21/60 , H01L23/48 , H01L21/768
CPC分类号: H01L24/81 , H01L21/304 , H01L21/3065 , H01L21/76898 , H01L23/481 , H01L23/482 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/05001 , H01L2224/05111 , H01L2224/05567 , H01L2224/05624 , H01L2224/13111 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014
摘要: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) are deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefor, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit.
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公开(公告)号:EP1503406A3
公开(公告)日:2009-07-08
申请号:EP04021536.0
申请日:1997-10-27
发明人: Siniaguine, Oleg
CPC分类号: H01L24/81 , H01L21/304 , H01L21/3065 , H01L21/76898 , H01L23/481 , H01L23/482 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/05001 , H01L2224/05111 , H01L2224/05567 , H01L2224/05624 , H01L2224/13111 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014
摘要: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) are deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefor, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit.
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公开(公告)号:EP1246224A3
公开(公告)日:2008-03-19
申请号:EP02011002.9
申请日:1998-11-06
发明人: Siniaguine, Oleg
CPC分类号: H01L21/67017 , C23C16/4584 , C23C16/513 , C23C16/54 , H01J37/32743 , H01J37/32788 , H01J2237/20228 , H01J2237/31701 , H01L21/67745 , H01L21/67796 , H01L21/68707
摘要: To move an article (134) in an out of plasma (12) during plasma processing, the article (134) is rotated by a first drive (140) around a first axis (140X), and the first drive is itself rotated by a second drive (150). As a result, the article (134) enters the plasma (120) at different angles for different positions of the first axis (140X). The plasma cross section (114-0) at the level at which the plasma (120) contacts the article (134) is asymmetric so that those points on the article (134) that move at a greater linear velocity (due to being farther away from the first axis (140X) move longer distances through the plasma (120). As a result, the plasma processing time becomes more uniform for different points on the article surface. In some embodiments, two shuttles (710-1, 710-2) are provided fro loading and unloading the plasma processing system. One of the shuttles (710-1) stands empty waiting to load them into the system, while the other shuttle (710-2) holds unprocessed articles (134) waiting to load them into the system. After the plasma processing terminates, the empty shuttle unloads processed articles (134) from the system, takes articles (134) away, and gets unloaded and reloaded with unprocessed articles (134). Meanwhile the other shuttle loads unprocessed articles (134) into the system and the plasma process begins. Since the plasma processing system does not wait for the first shuttle (170-1) the productivity of the system is increased.
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公开(公告)号:EP2270846A2
公开(公告)日:2011-01-05
申请号:EP10179557.3
申请日:1997-10-27
发明人: Siniaguine, Oleg
CPC分类号: H01L21/441 , H01L21/304 , H01L21/3065 , H01L21/76898 , H01L23/481 , H01L23/482 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/13025 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/0002 , H01L2924/014 , H01L2924/14 , H01L2924/00012 , H01L2224/05552
摘要: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) are deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefore, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit.
摘要翻译: 为了制造适用于垂直集成电路的背面接触焊盘,在晶片(110)的正面形成通孔,并将电介质(140)和接触焊盘金属(150)沉积到通孔中。 然后蚀刻晶片背面直到金属暴露(150℃)。 当蚀刻使通孔底部(140A,140B)处的绝缘体暴露时,绝缘体比晶片材料(例如硅)蚀刻得慢。 因此,当电介质被蚀刻掉并且金属被暴露时,在一些实施例中,电介质从晶圆背侧围绕暴露的金属接触垫向下突出约8μm。 当接触焊盘被焊接到下面的电路时,突出的电介质部分改善晶片和接触焊盘之间的绝缘。
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公开(公告)号:EP2270845A2
公开(公告)日:2011-01-05
申请号:EP10179553.2
申请日:1997-10-27
发明人: Siniaguine, Oleg
CPC分类号: H01L21/441 , H01L21/304 , H01L21/3065 , H01L21/76898 , H01L23/481 , H01L23/482 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/13025 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/0002 , H01L2924/014 , H01L2924/14 , H01L2924/00012 , H01L2224/05552
摘要: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) arc deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefore, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit.
摘要翻译: 为了制造适用于垂直集成电路的背面接触焊盘,在晶片(110)的正面制造通孔,并将电介质(140)和接触焊盘金属(150)电弧放置到通孔中。 然后蚀刻晶片背面直到金属暴露(150℃)。 当蚀刻使通孔底部(140A,140B)处的绝缘体暴露时,绝缘体比晶片材料(例如硅)蚀刻得慢。 因此,当电介质被蚀刻掉并且金属被暴露时,在一些实施例中,电介质从晶圆背侧围绕暴露的金属接触垫向下突出约8μm。 当接触焊盘被焊接到下面的电路时,突出的电介质部分改善晶片和接触焊盘之间的绝缘。
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6.
公开(公告)号:EP1503406A2
公开(公告)日:2005-02-02
申请号:EP04021536.0
申请日:1997-10-27
发明人: Siniaguine, Oleg
CPC分类号: H01L24/81 , H01L21/304 , H01L21/3065 , H01L21/76898 , H01L23/481 , H01L23/482 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/05001 , H01L2224/05111 , H01L2224/05567 , H01L2224/05624 , H01L2224/13111 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014
摘要: To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer (110), and dielectric (140) and contact pad metal (150) are deposited into the vias. Then the wafer back side is etched until the metal is exposed (150C). When the etch exposes the insulator at the via bottoms (140A, 140B), the insulator is etched slower than the wafer material (e.g. silicon). Therefor, when the dielectric is etched off and the metal is exposed, the dielectric protrudes down from the wafer back side around the exposed metal contact pads, by about 8 µm in some embodiments. The protruding dielectric portion improve insulation between the wafer and the contact pads when the contact pads are soldered to an underlying circuit.
摘要翻译: 为了制造适合于在垂直集成电路中使用的背面接触焊盘,在晶片(110)的表面侧形成通孔,并且电介质(140)和接触焊盘金属(150)沉积到通孔中。 然后蚀刻晶片背面直到金属暴露(150℃)。 当蚀刻在通孔底部(140A,140B)处暴露绝缘体时,绝缘体被蚀刻比晶片材料(例如硅)慢。 因此,当电介质被蚀刻并且金属被暴露时,在一些实施例中,电介质从暴露的金属接触焊盘周围的晶片背面向下突出大约8μm。 当接触焊盘焊接到底层电路时,突出的电介质部分改善晶片和接触焊盘之间的绝缘。
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