Abstract:
A display substrate includes a substrate, a first portion, a second portion, and a protruding portion. The first portion, the second portion, and the protruding portion are disposed over an upper surface of the substrate. The first portion is configured to coat a conductive adhesive thereon for attachment, and for electric coupling, of the display substrate with an encasing substrate. The second portion includes at least one wiring. The protruding portion is disposed between the first portion and the second portion, and is configured to prevent the conductive adhesive coated on the first portion from spreading to the second portion. One or more first depressions can be further arranged between the first portion and the protruding portion, configured such that a bottom surface thereof has a shorter distance to the upper surface of the substrate than the upper surface of the first portion.
Abstract:
A semiconductor device includes a thin-film diode ( 1 ) and a protection circuit with a protection diode ( 20 ). The thin-film diode ( 1 ) includes: a semiconductor layer with first, second and channel regions; a gate electrode; a first electrode ( S1 ) connected to the first region and the gate electrode; and a second electrode ( D1 ) connected to the second region. The conductivity type of the thin-film diode ( 1 ) may be N-type and the anode electrode of the protection diode ( 20 ) may be connected to a line ( 3 ) that is connected to either the gate electrode or the first electrode of the thin-film diode ( 1 ). Or the conductivity type of the thin-film diode may be P-type and the cathode electrode of the protection diode may be connected to the line that is connected to either the gate electrode or the first electrode of the thin-film diode. The protection circuit includes no other diodes that are connected to the line ( 3 ) so as to have a current flowing direction opposite to the protection diode's ( 20 ). As a result, deterioration of a thin-film diode due to ESD can be reduced with an increase in circuit size minimized.
Abstract:
A display device (100) according to an embodiment includes a plurality of driving blocks (COG) including a plurality of gate lines (GL) and a gate shorting structure spaced apart from the gate lines (GL) by an amount equal to a trimming region; an equipotential line (130) extending from one of the driving blocks (COG) to an adjacent driving block (COG), part of which is removed by the amount equal to the trimming region; a gate dummy line (132) extending from at least one of the driving blocks (COG); a plurality of data lines (DL) intersecting the gate lines (GL); and an active layer (138) disposed between the gate dummy line (132) and the data lines (DL), wherein some part of the active layer (138) that overlaps the gate dummy line (132) but does not overlap the data lines (DL) is removed.
Abstract:
Provided is a thin-film transistor array and a method for manufacturing the same, which prevents failure of a gate driver or power supply even when there is short-circuiting between a gate wire and a capacitor wire. The thin-film transistor array includes: an insulating substrate; a gate insulating film; a gate electrode, a gate wire connected to the gate electrode, a capacitor electrode, and a capacitor wire connected to the capacitor electrode, all of which sandwiching the gate insulating film with a source electrode, a source wire connected to the source electrode, a drain electrode, and a pixel electrode connected to the drain electrode. In the thin-film transistor array, the pixel electrode is laid over the capacitor electrode via the gate insulating film to have a storage capacitance; the source electrode and the drain electrode are laid over the gate electrode via the gate insulating film; a semiconductor layer is provided between the source electrode and the drain electrode; and a resistor is provided in part of the capacitor wire.
Abstract:
A gate driving circuit including a plurality of stages dependently connected to one another. Each stage comprises a gate pad formed at one end of a gate line; a pull-up transistor outputting a gate driving signal for driving the gate line; a capacitor formed with a dielectric substance disposed between a first electrode connected to a gate electrode of the pull-up transistor and a second electrode connected to a drain electrode of the pull-up transistor; a first connecting electrode connecting the gate pad to the second electrode; a holding transistor connected to the pull-up transistor to maintain a voltage level of the gate driving signal; a switching transistor connected to the pull-up transistor and the capacitor to control the holding transistor through the gate driving signal; and a second connecting electrode connecting the second electrode to the gate electrode of the switching transistor.
Abstract:
The present invention provides a short-circuit unit comprising: a plurality of signal lines divided into a plurality of groups, each group comprising multiple signal lines, and the multiple signal lines in a same group are not adjacent to each other; a plurality of short-circuit lines, each group of the signal lines correspond to one short-circuit line, and the short-circuit line electrically connects all of the signal lines in the group corresponding to the short-circuit line, the plurality of short-circuit lines are disposed in different layers and the short-circuit lines in different layers are insulated from each other. The present invention also provides an array substrate. In the short-circuit unit of the present invention, the short-circuit lines are disposed in different layers. Compared to the existing solutions in which the short-circuit lines are provided in a same layer, the width occupied by the short-circuit unit of the present invention is smaller.
Abstract:
The present disclosure is related to a liquid crystal display device including: a TFT array substrate (210) including an active display area and a non-active area which corresponds to the peripheral area of the active display area; a static electricity absorbing pattern (300) of a conductive lattice formed in the non-active area to absorb static electricity generated during the rubbing treatment of a liquid crystal alignment layer formed on the TFT array substrate (210); and a colour filter substrate (220) facing the TFT array substrate (210).
Abstract:
A semiconductor device ( 100 ) according to the present invention includes a diode element ( 10 ). The diode element ( 10 ) includes: a first electrode ( 3 ) made of the same electrically conductive film as a gate electrode of a thin film transistor; an oxide semiconductor layer ( 5 ); and a second electrode ( 6 ) and a third electrode ( 7 ) being made of the same electrically conductive film as a source electrode of the thin film transistor and being in contact with the oxide semiconductor layer ( 5 ). The oxide semiconductor layer ( 5 ) includes offset regions ( 19 ) respectively between the first electrode ( 3 ) and the second electrode ( 6 ) and between the first electrode ( 3 ) and the third electrode ( 7 ).