公开(公告)号：EP4381506A1

公开(公告)日：2024-06-12

申请号：EP22817440.5

申请日：2022-10-26

Applicant: Google LLC

Inventor： The designation of the inventor has not yet been filed

IPC: G11C29/02 ,  G11C29/00 ,  G11C29/12 ,  G11C29/24 ,  G11C29/28 ,  G11C29/44 ,  G11C29/26 ,  G11C29/32

CPC classification number: G11C29/81 ,  G11C29/86 ,  G11C29/4401 ,  G11C29/1201 ,  G11C2029/120820130101 ,  G11C29/28 ,  G11C2029/260220130101 ,  G11C2029/440220130101 ,  G11C29/022 ,  G11C29/025 ,  G11C29/32 ,  G11C2029/320220130101 ,  G11C29/24 ,  G11C29/812 ,  G11C29/027

公开(公告)号：EP4364146A1

公开(公告)日：2024-05-08

申请号：EP22743979.1

申请日：2022-06-16

Applicant: QUALCOMM INCORPORATED

Inventor： SAHU, Rahul ,  GUPTA, Sharad Kumar ,  KIM, Jung Pill ,  JUNG, Chulmin ,  ABRAHAM, Jais

IPC: G11C29/02 ,  G11C29/00 ,  G11C29/24 ,  G11C29/32 ,  G11C29/12 ,  G11C29/46

CPC classification number: G11C29/32 ,  G11C29/24 ,  G11C29/024 ,  G11C29/848 ,  G11C2029/320220130101 ,  G11C29/46 ,  G11C29/781 ,  G11C2029/120420130101

公开(公告)号：EP4362023A3

公开(公告)日：2024-05-22

申请号：EP23204287.9

申请日：2023-10-18

Applicant: NXP USA, Inc.

Inventor： Hoefler, Alexander ,  Stump, Jeffrey

IPC: G11C29/32

CPC classification number: G11C29/32 ,  G11C2029/320220130101 ,  G11C2029/040120130101

Abstract: A system includes test control circuitry and a memory. The memory includes a memory array, a pre-decode circuit, and a plurality of address latches. Each address latch of the plurality of address latches is configured to operate in a scan chain of a plurality of scan chains for scan testing. A first set of the plurality of address latches each has a data input coupled to a corresponding address pin of the first memory and each has an output coupled to the pre-decode circuit. A second set of the plurality of address latches, mutually exclusive of the first set, each has a data input coupled to a data input of at least one latch in the first set of the plurality of latches and each is configured to not provide any input to the pre-decode circuit.