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    VOLTAGE DIVIDER CIRCUIT
    2.
    发明授权
    VOLTAGE DIVIDER CIRCUIT 有权

    公开(公告)号：EP2897290B1

    公开(公告)日：2018-09-19

    申请号：EP13837239.6

    申请日：2013-08-13

    Applicant: ABLIC Inc.

    Inventor： TSUMURA, Kazuhiro

    IPC: H03H7/24 ,  H01C13/02 ,  H01L21/822 ,  H01L27/04 ,  G05F1/56 ,  H01L27/08 ,  H02M3/06

    CPC classification number: H02M3/06 ,  H01C13/02 ,  H01L27/0802 ,  H03H7/24

    Abstract: Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

    VOLTAGE DIVIDER CIRCUIT
    3.
    发明公开
    VOLTAGE DIVIDER CIRCUIT 审中-公开
    SPANNUNGSTEILERSCHALTUNG

    公开(公告)号：EP2897290A1

    公开(公告)日：2015-07-22

    申请号：EP13837239.6

    申请日：2013-08-13

    Applicant: Seiko Instruments Inc.

    Inventor： TSUMURA, Kazuhiro

    IPC: H03H7/24 ,  H01C13/02 ,  H01L21/822 ,  H01L27/04 ,  G05F1/56

    CPC classification number: H02M3/06 ,  H01C13/02 ,  H01L27/0802 ,  H03H7/24

    Abstract: Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other.

    Abstract translation: 提供了具有小面积和良好的分割精度的分压电路。 在分压器电路的多个电阻器中，具有大电阻值的每个电阻器，即具有高比例要求精度的电阻器（1 / 4R，1 / 2R，1R，9R，10R）的电阻器（1 / 4R，1 / 2R，1R，9R，10R）包括第一单位电阻器 5A）具有第一电阻值并且串联连接或并联连接，并且具有小电阻值的每个电阻器，即具有低所需要的比率精度的电阻器（1 / 16R，1 / 8R） 包括第二单元电阻器（5B），其具有小于第一电阻值的第二电阻值并且彼此并联连接。

    Method for fabricating an LED having vertical structure
    5.
    发明授权
    Method for fabricating an LED having vertical structure 有权
    Herstellungsverfahren einer Leuchtdiode mit vertikaler Struktur

    公开(公告)号：EP2261951B1

    公开(公告)日：2013-07-31

    申请号：EP10183510.6

    申请日：2003-03-31

    Applicant: LG Electronics Inc.

    Inventor： Lee, Jong-Lam ,  Jeong, In-Kwon ,  Yoo, Myung, Cheol

    IPC: H01L21/00

    CPC classification number: H01L33/12 ,  H01C7/006 ,  H01C7/008 ,  H01L27/0802 ,  H01L28/20 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/32 ,  H01L33/36 ,  H01L33/38 ,  H01L33/40 ,  H01L33/44 ,  H01L33/62 ,  Y10S438/958 ,  Y10S438/977

    Abstract: A light-emitting device, comprising: a conductive support layer (156); a first ohmic contact (150) over the conductive support layer; a first type GaN-based layer (128) over the first ohmic contact; an active layer (126) over the first type GaN-based layer; a second type GaN-based layer (124) over the active layer; and a second ohmic contact (160) over the second type GaN-based layer; wherein the light generated in the active layer emits mainly in the direction of at least one of the first type GaN-based layer and the second type GaN-based layer. The device may comprise a passivation layer (162) formed after substrate transfer.

    Abstract translation: 一种发光器件，包括：导电支撑层（156）; 导电支撑层上的第一欧姆接触（150）; 在第一欧姆接触上的第一类型GaN基层（128）; 位于所述第一类型GaN基层上的有源层（126）; 在所述有源层上的第二类型GaN基层（124）; 和在第二类型GaN基层上的第二欧姆接触（160）; 其中在所述有源层中产生的光主要在所述第一类型GaN基层和所述第二类型GaN基层中的至少一个的方向上发射。 该器件可以包括在衬底转移之后形成的钝化层（162）。

    Integrated resistor with titanium nitride and tantalum nitride resistance elements
    7.
    发明公开
    Integrated resistor with titanium nitride and tantalum nitride resistance elements 审中-公开
    Integrierter Widerstand mit Widerstandselementen aus Titannitrid und Tantalnitrid

    公开(公告)号：EP2434530A2

    公开(公告)日：2012-03-28

    申请号：EP11173115.4

    申请日：2011-07-07

    Applicant: Renesas Electronics Corporation

    Inventor： Sekine, Yasushi ,  Yamagata, Tadato

    IPC: H01L21/02 ,  H01L27/06 ,  H01L27/01

    CPC classification number: H01L28/24 ,  H01L27/016 ,  H01L27/0802 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: There is provided a semiconductor device having resistance elements small in temperature dependence of the resistance value. The semiconductor device has two metal resistance element layers (Rm1,Rm2). Each metal resistance element layer includes a resistance film layer (Rm12,Rm11). One of the metal resistance film layers is of titanium nitride and the other one of tantalum nitride. The resistance value of titanium nitride has a positive temperature coefficient. Whereas, the resistance value of tantalum nitride has a negative temperature coefficient. A contact plug (P2) electrically couples the metal resistance film layers with each other. Therefore, the temperature coefficient of the titanium nitride and the temperature coefficient of the tantalum nitride cancel each other.

    Abstract translation: 提供了具有电阻值温度依赖性小的电阻元件的半导体器件。 半导体器件具有两个金属电阻元件层（Rm1，Rm2）。 每个金属电阻元件层包括电阻膜层（Rm12，Rm11）。 金属电阻膜层之一是氮化钛，另一个是氮化钽。 氮化钛的电阻值为正温度系数。 而氮化钽的电阻值为负温度系数。 接触插头（P2）将金属电阻膜层彼此电耦合。 因此，氮化钛的温度系数和氮化钽的温度系数相互抵消。

    INTEGRATED CIRCUIT RESISTOR
    8.
    发明授权
    INTEGRATED CIRCUIT RESISTOR 有权
    电阻的集成电路

    公开(公告)号：EP1790009B1

    公开(公告)日：2011-01-05

    申请号：EP05789167.3

    申请日：2005-08-11

    Applicant: RAYTHEON COMPANY

    Inventor： HESTON, David, D. ,  MOONEY, Jon, E.

    IPC: H01L27/06 ,  H01L27/08

    CPC classification number: H01L27/0605 ,  H01L27/0802

    Abstract: An integrated circuit resistor is provided that comprises a mesa (14) between electrical contacts (16) and (18). The electrical resistance between electrical contacts (16) and (18) is selectively increased through the formation of recesses (20) and (22) in the mesa (14). The size of recesses (20) and (22) can be used to tune the value of the electrical resistance between contacts (16) and (18).

    Method of making self-aligned nanotube contact structures
    10.
    发明公开
    Method of making self-aligned nanotube contact structures 审中-公开
    一种用于制造自对准接触结构的纳米管处理

    公开(公告)号：EP2131391A3

    公开(公告)日：2010-08-25

    申请号：EP09160883.6

    申请日：2009-05-21

    Applicant: Honeywell International Inc.

    Inventor： Keyser, Thomas

    IPC: H01L21/768 ,  H01L23/532

    CPC classification number: H01L23/53276 ,  B81C1/00095 ,  H01C17/06 ,  H01L21/76838 ,  H01L23/5228 ,  H01L27/0802 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49204 ,  H01L2924/00

    Abstract: A method for forming a self-aligned nanotube contact structure by selectively depositing metal over nanotubes or through a nanotube network onto an interconnect layer formed below is provided. An interconnect layer is formed over a first layer of a microelectronics device. A second layer of the microelectronics device is then formed over the interconnect layer and vias are patterned through the second layer. The vias are filled with metal and a nanotube layer is formed over the vias such that openings remain in the nanotube layer. Self-aligned electrodes are formed in the openings by selective electroless plating or chemical vapor deposition such that the electrodes substantially fill only the openings in the nanotube layer that substantially reside over the metal in the vias. The resulting self-aligned nanotube contact structure envelops individual nanotubes in the region and provides low contact resistance.

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