INTEGRATED CIRCUIT COMPRISING A VERTICAL TRANSISTOR
    3.
    发明授权
    INTEGRATED CIRCUIT COMPRISING A VERTICAL TRANSISTOR 失效
    与垂直晶体管集成电路。

    公开(公告)号:EP0419586B1

    公开(公告)日:1994-11-30

    申请号:EP90901040.7

    申请日:1989-12-18

    发明人: LEDUC, Pierre

    IPC分类号: H01L29/73 H01L29/10

    摘要: The invention relates to an integrated circuit comprising a vertical transistor having an emitter comprising at least one zone (12), a base (2) having a base contacting region (15) adjoining a major surface of the integrated circuit, and a collector (5). An improved inverse current amplification is obtained in the case in which the overall thickness of the base is less than or equal to the diffusion length of the minority charge carriers in these regions, when the ratio between the surface Sx of a base contacting region (15) and the surface SM of a base contact window region is at least equal to 10, and when the base contacting region (15) has a surface smaller than 5 times that of the emitter region.

    A method for forming a channel stopper in a semiconductor structure
    4.
    发明公开
    A method for forming a channel stopper in a semiconductor structure 失效
    一种在半导体结构中形成通道停止的方法

    公开(公告)号:EP0386798A3

    公开(公告)日:1993-11-03

    申请号:EP90106467.5

    申请日:1982-10-19

    发明人: Ko, Wen-Chuang

    IPC分类号: H01L21/76 H01L21/265

    摘要: A method of forming a channel stopper in a semiconductor structure containing a substrate including the steps:
    forming a protective layer of material of a predetermined thickness over a portion of said substrate;
    implanting ions through said protective layer using a dosage of at least 1x10¹⁵ ions/cm² to form a channel stop region in said substrate beneath said protective layer; then
    annealing said structure before the following oxidizing step; then,
    oxidizing said structure to form an oxide layer over said portion of said substrate to a thickness no greater than substantially 1 micrometer (micron), thereby to minimize the lateral encroachment of said oxide material, where the thickness of said protective layer is such that said implanting, annealing, and oxidizing does not cause stacking faults in said channel stop region.

    Bipolar transistor and manufacturing method thereof
    5.
    发明公开
    Bipolar transistor and manufacturing method thereof 失效
    双极晶体管及其制造方法

    公开(公告)号:EP0395358A3

    公开(公告)日:1991-01-02

    申请号:EP90304401.4

    申请日:1990-04-24

    发明人: Sawada, Shigeki

    摘要: The invention is to form an intrinsic base layer (16) by doping an impurity in the emitter polysilicon electrode (15) into the intrinsic base region (16) of the surface of a semiconductor substrate (1) by heat treatment through the emitter lead-out part hole (14) self-aligned to the base lead-out electrode (7). Thus, beneath the insulation film of the substrate surface between the base lead-out part hole and emitter lead-out part hole (14), the outer marginal part of the intrinsic base layer (16) and the inner marginal part of the extrinsic base layer (11) overlap uniformly. Still more, since the diffusion of the impurity by heat treatment is very fast in the polysilicon emitter electrode as compared with that in the silicon substrate, an extremely shallow intrinsic base layer (16) may be formed.

    SEMICONDUCTOR DEVICE COMPRISING AN INTEGRATED CIRCUIT HAVING A VERTICAL TRANSISTOR
    6.
    发明公开
    SEMICONDUCTOR DEVICE COMPRISING AN INTEGRATED CIRCUIT HAVING A VERTICAL TRANSISTOR 失效
    半导体器件由具有集成电路的垂直型晶体管包含的内容。

    公开(公告)号:EP0401354A1

    公开(公告)日:1990-12-12

    申请号:EP90901039.0

    申请日:1989-12-18

    发明人: LEDUC, Pierre

    IPC分类号: H01L29 H01L21 H01L27

    摘要: La présente invention concerne un circuit intégré à transistor vertical. On obtient un transistor ayant une amplification de courant beta notablement supérieure à un transistor classique grâce au fait que l'émetteur (5) dudit transistor présente une épaisseur et un niveau de dopage tels que la longueur de diffusion des porteurs minoritaires de charge injectés verticalement dans ce dernier est supérieure ou égale à l'épaisseur de l'émetteur (5), et que la région de contact de l'émetteur est si faible que pendant le fonctionnement, le courant total des porteurs minoritaires de charge injectés depuis la base dans la région d'émetteur est bien plus faible que la densité de courant des porteurs minoritaires injectés depuis la base dans la région d'émetteur au-dessous de la région de contact d'émetteur, multipliée par la surface totale de la région d'émetteur.

    Submicron bipolar transistor with edge contacts
    7.
    发明公开
    Submicron bipolar transistor with edge contacts 失效
    带边缘接触器的SUBMICRON双极晶体管

    公开(公告)号:EP0306213A3

    公开(公告)日:1990-05-30

    申请号:EP88307872.7

    申请日:1988-08-25

    申请人: AT&T Corp.

    IPC分类号: H01L29/52 H01L29/72

    摘要: A new sub-micron bipolar transistor structure is proposed which utilizes narrow horizontal conducting layers between the edges of the active areas and the associated metal contacts. This structure allows the formation of a completely vertical transistor structure and eliminates the need for the extended buried collector and collector reach-through diffusion regions.

    Als Fotodetektor verwendbare Bipolartransistorstruktur
    8.
    发明公开
    Als Fotodetektor verwendbare Bipolartransistorstruktur 失效
    Als Fotodetektor verwendbare Bipolartransistorstruktur。

    公开(公告)号:EP0339386A2

    公开(公告)日:1989-11-02

    申请号:EP89106622.7

    申请日:1989-04-13

    发明人: Bock, Wolfgang

    IPC分类号: H01L31/10

    摘要: Die Bipolartransistorstruktur weist eine vertikale Emitter-Basis-Kollektorfolge auf, in der der Emitter (13) über einen Emitteranschlußbereich (18) mit einem metallischen Emitterkontakt (19) verbunden ist. Der Emit­teranschlußbereich (18) erstreckt sich über den Emitter (13) hinaus auf die Oberfläche des die Bipolartransistor­struktur enthaltenden Substrats (10) Der Emitterkontakt (19) überdeckt den Emitteranschlußbereich (18) nur teilweise, so daß der Emitter (13) im Bereich der vertikalen Emitter-­Basis-Kollektorfolge nicht unterhalb des Emitterkontakts (19) liegt. Der Emitteranschlußbereich (18) ist im Bereich der vertikalen Emitter-Basis-Kollektorfolge lichtdurch­lässig und in diesem Bereich auch nur von lichtdurchläs­sigen Schichten (21) bedeckt, so daß ein direktes Einstrah­len von Licht in den aktiven Transistorbereich möglich ist. Insbesondere Bipolartransistorstrukturen, die in einem Doppel-Polysilizium-Prozeß selbstjustiert gebildet sind, sind zur Verwendung als Fototransistoren zur Detektion von optischen Datenraten im Gbit/s-Bereich direkt innerhalb hochintegrierter Silizium-Bipolarschaltungen geeignet.

    摘要翻译: 双极晶体管结构具有垂直的发射极/基极/集电极序列,其中发射极(13)经由发射极端子区域(18)连接到金属发射极触点(19)。 发射极端子区域(18)延伸超过发射极(13)到包含双极晶体管结构的衬底(10)的表面上。 发射极触点(19)仅部分地跨越发射极端子区域(18),使得发射极(13)不在垂直发射极/基极/集电极序列区域内的发射极触点(19)的下方。 发射极端子区域(18)在垂直发射极/基极/集电极序列的区域中对于光是透明的,并且也仅由该区域中可透光的层(21)覆盖,使得将光直接照射到有源 晶体管区域是可能的。 特别地,在双重多晶硅工艺中以自对准的方式制造的双极晶体管结构适用于直接在高密度硅双极电路内检测Gbit / s区域中的光学数据速率的光电晶体管。

    Bipolar transistor device and method of manufacturing the same
    10.
    发明公开
    Bipolar transistor device and method of manufacturing the same 失效
    Bipolartransistor和Verfahren zu seiner Herstellung。

    公开(公告)号:EP0335720A2

    公开(公告)日:1989-10-04

    申请号:EP89303158.3

    申请日:1989-03-30

    IPC分类号: H01L29/72 H01L29/08 H01L29/10

    摘要: A bipolar transistor device according to the present invention comprises a collector region (112, 116) of a first conductivity type formed on a semiconductor substrate (110), a base region (118) of a second conductivity type formed on the collector region, a mesa type emitter region (120, 122, 124) of the first conductivity type formed on the base region, a base electrode (138) formed on the base region and separated from a bottom portion of the mesa type emitter region, a resin layer (146) formed on the base electrode and covering a side face of the emitter region and the base region exposed between the base electrode and the bottom portion of the emitter region, and an emitter electrode (136) overlapping at its end portion with the base electrode with the resin layer being interposed.

    摘要翻译: 根据本发明的双极晶体管器件包括形成在半导体衬底(110)上的第一导电类型的集电极区域(112,116),形成在集电区域上的第二导电类型的基极区域(118), 形成在基底区域上的第一导电类型的台面型发射极区域(120,122,124),形成在基极区域上并与台面型发射极区域的底部分离的基极(138),树脂层 146),其形成在所述基极上并且覆盖所述发射极区域的侧面和暴露在所述基极和所述发射极区域的底部之间的基极区域;以及发射极电极(136),所述发射极电极(136)的端部与所述基极 树脂层被插入。