Abstract:
In a single-stage differential operational amplifier (30): an input stage formed by a pair of input transistors (31, 32), having control terminals connected to a respective first and second input (IN+, IN - ), first conduction terminals coupled to a respective first and second output (OUT-, OUT + ) and second conduction terminals able to receive a polarization current (I b ); an output stage formed by a pair of output transistors (34, 35), in diode configuration, having control terminals able to be coupled to a relative first conduction terminal, connected to a respective first and second output (OUT-, OUT+), and second conduction terminals connected to a reference line (gnd). A coupling stage (36) is furthermore interposed between the first conduction terminals of the output transistors (34, 35) and the first and second output (OUT-, OUT+) to define the diode configuration of the output transistors (34, 35) and moreover a gain value (G) of the operational amplifier (30) .
Abstract:
Exemplary embodiments are directed to operating a multi-stage amplifier with low-voltage supply voltages. A multi-stage amplifier may include a first path of an amplifier output stage configured to convey an output signal if a first supply voltage is greater than a threshold voltage. The multi-stage amplifier may also include a second path of the amplifier output stage configured to convey the output signal if the first supply voltage is less than or equal to the threshold voltage.
Abstract:
The invention relates to a two-stage operational amplifier (400) in class AB for driving a load (R LB , R LA ) comprising: - an input stage (401) comprising differential input terminals (I N , I P ) and a first differential output terminal (O1P) and a second differential output terminal (O1N); - an output stage (402) comprising a first output branch (403) and a second output branch (404); - a control circuit (405) comprising a first PMOS transistor (M BP2B ) connected in a current mirror configuration to a second PMOS transistor (M L2B ) of the first output branch (403), a first NMOS transistor (M BNB ) connected in series with the first PMOS transistor (M BP2B ), a third PMOS transistor (M BP2A ) connected in a current mirror configuration to a fourth PMOS transistor (M L2A ) of the second output branch (404), a second NMOS transistor (M BNA ) connected in series with the third PMOS transistor (M BP2A ).
Abstract:
A bypass circuit (5) is disclosed for use with lower power supply voltage PC cards. The bypass circuit (5) controls the power supply voltage fed to a power amplifier (25) when switching between a lower power 8-PSK modulation mode and a higher power GMSK modulation mode. A step-up DC/DC converter (35) provides a higher voltage to the power amplifier (25) than can be supplied by an original power supply. Switch control logic (10) controls a step-up switch (15) and a battery switch (20). The step-up switch (15) is turned on when operating in an 8-PSK modulation mode to provide a higher voltage to the power amplifier (25) than the original power supply voltage (40). The battery switch (20) is turned on when operating in the GMSK modulation mode to provide the original power supply voltage (40) to the power amplifier (25).
Abstract:
The bias control (300) selectively provides for bias of a power amplifier (120) based upon a bandgap voltage (442) generated by the bias control, or by a bias voltage external to the bias control. A controller (420) controls the selection of either the bandgap voltage (442) or external bias voltage. The bias control is fabricated in a first semiconductor material capable of operating at low voltage supply levels, such as complementary metal oxide semiconductor (CMOS) material and may be fabricated on an integrated circuit common with a power amplifier.
Abstract:
A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier (1), a load resistor (2) having one end connected to an output terminal of the current output amplifier and a voltage control circuit (3) having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.
Abstract:
The invention relates to a push-pull amplifier having a level shift circuit to generate different control signals to a driver of a switch. The amplifier has to cope with the voltage limitations of the device. To reduce standby power the level shifter is used. The solution of the invention has as one of the great advantages that only during transitions a current will flow.