DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT
    1.
    发明公开
    DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT 有权
    DUMMY-LASTSCHALTUNG UND LADUNGSDETEKTIONSSCHALTUNG

    公开(公告)号:EP2982996A4

    公开(公告)日:2016-12-07

    申请号:EP14778279

    申请日:2014-03-26

    发明人: TAKASE YASUHIDE

    摘要: A pseudo resistor circuit and a charge amplifier each include a first field effect transistor (Ma); a second field effect transistor (Mb) having electrical characteristics matched with electrical characteristics of the first field effect transistor (Ma); a voltage dividing circuit (21) in which one terminal of a reference resistor (Rstd) is electrically connected to a source terminal of the second field effect transistor; a first operational amplifier (OP1) an output terminal of which is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into one of an inverting input terminal and a non-inverting input terminal and reference voltage is input into the other of the inverting input terminal and the non-inverting input terminal; and a second operational amplifier (OP2) that supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the reference resistor.

    摘要翻译: 伪电阻电路和电荷放大器各自包括第一场效应晶体管(Ma); 具有与第一场效应晶体管(Ma)的电特性匹配的电特性的第二场效应晶体管(Mb); 分压电路(21),其中参考电阻器(Rstd)的一个端子电连接到第二场效应晶体管的源极端子; 第一运算放大器(OP1),其输出端连接到第一场效应晶体管的栅极端子和第二场效应晶体管的栅极端子,并且其中分压电路的中点电压被输入到 反相输入端子和非反相输入端子,参考电压输入到反相输入端子和非反相输入端子中的另一个; 以及第二运算放大器(OP2),其将由第一场效应晶体管的漏极电压的反相和放大产生的电压提供给参考电阻器的另一端。

    DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT
    2.
    发明授权
    DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT 有权
    虚电路负载电路和电荷检测电路

    公开(公告)号:EP2982996B1

    公开(公告)日:2018-04-25

    申请号:EP14778279.1

    申请日:2014-03-26

    发明人: TAKASE, Yasuhide

    摘要: A pseudo resistor circuit and a charge amplifier each include a first field effect transistor (Ma); a second field effect transistor (Mb) having electrical characteristics matched with electrical characteristics of the first field effect transistor (Ma); a voltage dividing circuit (21) in which one terminal of a reference resistor (Rstd) is electrically connected to a source terminal of the second field effect transistor; a first operational amplifier (OP1) an output terminal of which is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into one of an inverting input terminal and a non-inverting input terminal and reference voltage is input into the other of the inverting input terminal and the non-inverting input terminal; and a second operational amplifier (OP2) that supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the reference resistor.

    Temperature stabilized circuitry
    3.
    发明公开
    Temperature stabilized circuitry 审中-公开
    温度稳定电路

    公开(公告)号:EP2897168A3

    公开(公告)日:2015-08-05

    申请号:EP14193854.8

    申请日:2014-11-19

    IPC分类号: H01L27/12

    摘要: This disclosure relates to temperature stabilization of at least a portion of an amplifier, such as a logarithmic amplifier, and/or a band gap reference circuit. In one aspect, one or more stages of an amplifier, a heater, and a temperature sensor are included in a semiconductor material and surrounded by thermally insulating sidewalls.

    摘要翻译: 本公开涉及放大器(诸如对数放大器)和/或带隙参考电路的至少一部分的温度稳定。 在一个方面,放大器,加热器和温度传感器的一个或多个级被包括在半导体材料中并且被隔热侧壁包围。

    ZERO DRIFT, LIMITLESS AND ADJUSTABLE REFERENCE VOLTAGE GENERATION
    4.
    发明公开
    ZERO DRIFT, LIMITLESS AND ADJUSTABLE REFERENCE VOLTAGE GENERATION 审中-公开
    无线电无线电无线电

    公开(公告)号:EP3079256A1

    公开(公告)日:2016-10-12

    申请号:EP16164181.6

    申请日:2016-04-07

    摘要: A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U21, U31, U32, U41, U51), a low pass filter (R21, C21; R31, C31; R41, C41; R51, C51) and an operational amplifier (OA21, OA31, OA41, OA51)), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C22, C32, C44, C54) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R22, S21; R33, R34, S32; R33, R35, C35, S31), which chopped signal is adapted to be modulated by the output signal of the digital buffer.

    摘要翻译: 用于产生电子系统的参考电压的电路,该电路包括至少一个数字缓冲器(U21,U31,U32,U41,U51),低通滤波器(R21,C21; R31,C31; R41,C41; R51,C51)和运算放大器(OA21,OA31,OA41,OA51)),该电路适于将带隙参考电压形式的输入恢复到数字缓冲器中,该数字缓冲器适于接收数字输入 来自脉宽调制(PWM)信号,该数字缓冲器适于产生适于馈送到低通滤波器的输出信号,滤波后的输出信号适于馈送到运算放大器的正输入端, 该运算放大器包括反馈电路,该反馈电路包括适于从运算放大器的输出端子向运算放大器的负输入端连接的至少一个电容器(C22,C32,C44,C54),以形成 一个整合 其中所述反馈电路还包括至少一个斩波信号路径(R22,S21; R33,R34,S32; R33,R35,C35,S31),该斩波信号适于由数字缓冲器的输出信号进行调制。

    DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT
    5.
    发明公开
    DUMMY LOAD CIRCUIT AND CHARGE DETECTION CIRCUIT 有权
    虚电路负载电路和电荷检测电路

    公开(公告)号:EP2982996A1

    公开(公告)日:2016-02-10

    申请号:EP14778279.1

    申请日:2014-03-26

    发明人: TAKASE, Yasuhide

    摘要: A pseudo resistor circuit and a charge amplifier each include a first field effect transistor (Ma); a second field effect transistor (Mb) having electrical characteristics matched with electrical characteristics of the first field effect transistor (Ma); a voltage dividing circuit (21) in which one terminal of a reference resistor (Rstd) is electrically connected to a source terminal of the second field effect transistor; a first operational amplifier (OP1) an output terminal of which is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into one of an inverting input terminal and a non-inverting input terminal and reference voltage is input into the other of the inverting input terminal and the non-inverting input terminal; and a second operational amplifier (OP2) that supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the reference resistor.

    摘要翻译: 伪电阻电路和电荷放大器均包括第一场效应晶体管(Ma); 具有与所述第一场效应晶体管(Ma)的电特性相匹配的电特性的第二场效应晶体管(Mb); 分压电路(21),其中参考电阻器(Rstd)的一个端子电连接到所述第二场效应晶体管的源极端子; 第一运算放大器(OP1),其输出端连接到第一场效应晶体管的栅极端和第二场效应晶体管的栅极端,并且其中分压电路的中点电压被输入到 非反相输入端子和非反相输入端子,并且参考电压输入到反相输入端子和非反相输入端子中的另一个; 以及第二运算放大器(OP2),其将所述第一场效应晶体管的漏极电压的反转放大后的电压供给到所述基准电阻的另一端。

    Temperature stabilized circuitry
    6.
    发明公开
    Temperature stabilized circuitry 审中-公开
    Temperaturstabilisierter Schaltkreis

    公开(公告)号:EP2897168A2

    公开(公告)日:2015-07-22

    申请号:EP14193854.8

    申请日:2014-11-19

    IPC分类号: H01L27/12

    摘要: This disclosure relates to temperature stabilization of at least a portion of an amplifier, such as a logarithmic amplifier, and/or a band gap reference circuit. In one aspect, one or more stages of an amplifier, a heater, and a temperature sensor are included in a semiconductor material and surrounded by thermally insulating sidewalls.

    摘要翻译: 本公开涉及放大器的至少一部分的温度稳定性,例如对数放大器和/或带隙基准电路。 在一个方面,放大器,加热器和温度传感器的一个或多个级包括在半导体材料中并被隔热侧壁包围。