摘要:
In order to reduce the effect of mismatch in the I and Q paths of a quadrature device, which may be, for example, a mixer or a sigma-delta modulator, the data on the paths are swapped at high speed.
摘要:
In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise "delta-two-maximum pattern." Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
摘要:
A system may include a detector, a controller, a shuffler, and a processor. The detector may detect a signal. The controller may control the shuffler based upon the signal. The shuffler may shuffle a plurality of channels at the input of a plurality of processing elements of the processor based upon the signal. The processor may process the signal according to the plurality of channels as configured by the shuffler.
摘要:
A method and system for integrating a mismatch noise shaper (108) into the main loop of a delta-sigma modulator (100) are disclosed. The output of the mismatch noise shaper (108) is fed back to the summer (102) as a feedback signal that is responsive to the mismatch noise shaper (108). At appropriate times, the mismatch noise shaper (108) selectively overrides the quantizer so that the output of the noise shaper differs from an output of the quantizer. The overriding feature distinguishes the present invention from a DEM, as the output of a DEM is only a re-ordering of the same number of elements as its input. The mismatch noise shaper (108) selectively overrides the quantizer when the output of the quantizer has prevented the mismatch noise shaper (108) to control selection of elements at the output of the mismatch noise shaper (108) for a pre-determined time period.
摘要:
A signal scaling circuit for accurately reducing the effective amplitude of an input signal by a rational factor N/M, where N and M are integers and N
摘要:
A signal scaling circuit for accurately reducing the effective amplitude of an input signal by a rational factor N/M, where N and M are integers and N
摘要:
A method and system for integrating a mismatch noise shaper (108) into the main loop of a delta-sigma modulator (100) are disclosed. The output of the mismatch noise shaper (108) is fed back to the summer (102) as a feedback signal that is responsive to the mismatch noise shaper (108). At appropriate times, the mismatch noise shaper (108) selectively overrides the quantizer so that the output of the noise shaper differs from an output of the quantizer. The overriding feature distinguishes the present invention from a DEM, as the output of a DEM is only a re-ordering of the same number of elements as its input. The mismatch noise shaper (108) selectively overrides the quantizer when the output of the quantizer has prevented the mismatch noise shaper (108) to control selection of elements at the output of the mismatch noise shaper (108) for a pre-determined time period.