公开(公告)号：EP4396687A1

公开(公告)日：2024-07-10

申请号：EP22753967.3

申请日：2022-07-20

申请人： QUALCOMM INCORPORATED

发明人： BLASCO, Conrado ,  MONTERO, Adrian ,  KITCHIN, Paul ,  KANAPATHIPILLAI, Pradeep ,  SANJELIWALA, Huzefa

IPC分类号： G06F12/1009 ,  G06F12/0808

CPC分类号： G06F12/1009 ,  G06F12/0808 ,  G06F2212/68320130101

公开(公告)号：EP3889787B1

公开(公告)日：2023-11-01

申请号：EP21168711.6

申请日：2016-12-12

发明人： BRANDT, Jason W. ,  CHAPPELL, Robert S. ,  CORBAL, Jesus ,  GROCHOWSKI, Edward T. ,  GUNTHER, Stephen H. ,  GUY, Buford M. ,  HUFF, Thomas R. ,  HUGHES, Christopher J. ,  OULD-AHMED-VALL, Elmoustapha ,  SINGHAL, Ronak ,  SOTOUDEH, Seyed Yahya ,  TOLL, Bret L. ,  RAPPOPORT, Lihu ,  PAPWORTH, David ,  ALLEN, James D.

IPC分类号： G06F12/0808 ,  G06F12/0817 ,  G06F12/0831

公开(公告)号：EP3639145B1

公开(公告)日：2024-03-20

申请号：EP18818109.3

申请日：2018-05-15

发明人： WARE, Frederick, A.

IPC分类号： G06F12/02 ,  G06F12/08 ,  G06F12/06 ,  G06F12/0802 ,  G06F12/0804 ,  G06F12/0808 ,  G06F12/0893 ,  G06F12/0891 ,  G06F12/0846 ,  G06F12/0895 ,  G06F12/0855 ,  G06F12/0871 ,  G06F12/0864 ,  G06F12/0868 ,  G06F12/0897

公开(公告)号：EP3889787A1

公开(公告)日：2021-10-06

申请号：EP21168711.6

申请日：2016-12-12

申请人： Intel Corporation

发明人： BRANDT, Jason W. ,  CHAPPELL, Robert S. ,  CORBAL, Jesus ,  GROCHOWSKI, Edward T. ,  GUNTHER, Stephen H. ,  GUY, Buford M. ,  HUFF, Thomas R. ,  HUGHES, Christopher J. ,  OULD-AHMED-VALL, Elmoustapha ,  SINGHAL, Ronak ,  SOTOUDEH, Seyed Yahya ,  TOLL, Bret L. ,  RAPPOPORT, Lihu ,  PAPWORTH, David ,  ALLEN, James D.

IPC分类号： G06F12/0808 ,  G06F12/0817 ,  G06F12/0831

摘要： Embodiments of an invention a processor architecture are disclosed. In an embodiment, a processor includes a decoder, an execution unit, a coherent cache, and an interconnect. The decoder is to decode an instruction to zero a cache line. The execution unit is to issue a write command to initiate a cache line sized write of zeros. The coherent cache is to receive the write command, to determine whether there is a hit in the coherent cache and whether a cache coherency protocol state of the hit cache line is a modified state or an exclusive state, to configure a cache line to indicate all zeros, and to issue the write command toward the interconnect. The interconnect is to, responsive to receipt of the write command, issue a snoop to each of a plurality of other coherent caches for which it must be determined if there is a hit.

公开(公告)号：EP3552108B1

公开(公告)日：2021-08-18

申请号：EP16923787.2

申请日：2016-12-12

发明人： BRANDT, Jason W. ,  CHAPPELL, Robert S. ,  CORBAL, Jesus ,  GROCHOWSKI, Edward T. ,  GUNTHER, Stephen H. ,  GUY, Buford M. ,  HUFF, Thomas R. ,  HUGHES, Christopher J. ,  OULD-AHMED-VALL, Elmoustapha ,  SINGHAL, Ronak ,  SOTOUDEH, Seyed Yahya ,  TOLL, Bret L. ,  RAPPOPORT, Lihu ,  PAPWORTH, David ,  ALLEN, James D.

IPC分类号： G06F12/0808 ,  G06F12/0817 ,  G06F12/0831

公开(公告)号：EP2839380B1

公开(公告)日：2017-04-19

申请号：EP14720764.1

申请日：2014-03-12

申请人： Oracle International Corporation

发明人： LOEWENSTEIN, Paul N. ,  PHILLIPS, Stephen E. ,  SMENTEK, David Richard ,  CHEUNG, Connie Wai Mun ,  LEUNG, Serena Wing Yee ,  WALKER, Damien ,  SIVARAMAKRISHNAN, Ramaswamy

IPC分类号： G06F12/0808 ,  G06F12/0811 ,  G06F12/0817

CPC分类号： G06F12/0808 ,  G06F12/0811 ,  G06F12/0817 ,  G06F12/0828

公开(公告)号：EP3014457A4

公开(公告)日：2017-03-08

申请号：EP14818717

申请日：2014-06-18

申请人： INTEL CORP

发明人： GUPTA NIRAJ ,  JIANG HONG

IPC分类号： G06F12/08 ,  G06F12/0808 ,  G06F12/0837 ,  G06F13/14

CPC分类号： G06F12/0837 ,  G06F12/0808 ,  G06F2212/302

公开(公告)号：EP3676715B1

公开(公告)日：2024-03-27

申请号：EP18850497.1

申请日：2018-08-28

发明人： CAGDAS, Dirik ,  WALKER, Robert M.

IPC分类号： G06F12/0893 ,  G06F12/0866 ,  G06F12/0804 ,  G06F13/16 ,  G06F12/0808

公开(公告)号：EP3800557B1

公开(公告)日：2023-09-27

申请号：EP20197596.8

申请日：2016-02-26

发明人： BLANKENSHIP, Robert G.

IPC分类号： G06F13/16 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0808 ,  G06F12/0817 ,  G06F12/12 ,  G06F12/128 ,  G06F12/0831

公开(公告)号：EP3800557A1

公开(公告)日：2021-04-07

申请号：EP20197596.8

申请日：2016-02-26

申请人： INTEL Corporation

发明人： BLANKENSHIP, Robert G.

IPC分类号： G06F13/16 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0808 ,  G06F12/0817 ,  G06F12/12 ,  G06F12/128 ,  G06F12/0831

摘要： A request is received over a link that requests a particular line in memory. A directory state record is identified in memory that identifies a directory state of the particular line. A type of the request is identified from the request. It is determined that the directory state of the particular line is to change from the particular state to a new state based on the directory state of the particular line and the type of the request. The directory state record is changed, in response to receipt of the request, to reflect the new state. A copy of the particular line is sent in response to the request.