公开(公告)号：EP3028309B1

公开(公告)日：2020-03-25

申请号：EP14736226.3

申请日：2014-06-12

申请人： Qualcomm Incorporated

发明人： LI, Xia ,  YANG, Bin ,  KANG, Seung Hyuk

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/788 ,  H01L27/088 ,  H01L27/11517 ,  H01L27/12 ,  H01L21/84 ,  H01L29/78

公开(公告)号：EP3070846A4

公开(公告)日：2017-08-23

申请号：EP14862630

申请日：2014-11-13

申请人： ASAHI KASEI MICRODEVICES CORP

发明人： YAMAHA YOSHIRO ,  TAKEHARA SATOSHI

IPC分类号： H03K5/08 ,  G01R19/165 ,  G05F3/24 ,  G11C5/14 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  H01L21/28 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/04 ,  H01L27/088 ,  H01L27/115 ,  H01L27/11517 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C16/10 ,  G01R19/16576 ,  G05F3/24 ,  G11C5/147 ,  G11C16/0408 ,  G11C16/0425 ,  G11C16/30 ,  H01L21/28273 ,  H01L27/0883 ,  H01L27/11517 ,  H01L29/7883 ,  H03K5/082

摘要： A voltage detector for detecting whether an input voltage is no lower than a predetermined threshold voltage, includes a reference voltage generator configured to generate a reference voltage, and a comparator configured to receive the input voltage and the reference voltage and to detect whether the input voltage is no lower than the threshold voltage that is determined by the reference voltage. Here, the reference voltage generator includes a first write MOS transistor, a second write MOS transistor, a first output MOS transistor and a second output MOS transistor each including a control gate and a floating gate.

摘要翻译： 用于检测输入电压是否不低于预定阈值电压的电压检测器包括被配置为生成参考电压的参考电压生成器以及被配置为接收输入电压和参考电压并检测输入电压 不低于由参考电压确定的阈值电压。 这里，参考电压发生器包括分别包括控制栅极和浮动栅极的第一写入MOS晶体管，第二写入MOS晶体管，第一输出MOS晶体管和第二输出MOS晶体管。

公开(公告)号：EP3070846B1

公开(公告)日：2020-04-01

申请号：EP14862630.2

申请日：2014-11-13

申请人： Asahi Kasei Microdevices Corporation

发明人： YAMAHA Yoshiro ,  TAKEHARA Satoshi

IPC分类号： H03K5/08 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/04 ,  H01L27/088 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G05F3/24 ,  G11C5/14 ,  G01R19/165 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  H01L21/28 ,  H01L27/11517

公开(公告)号：EP1455394B1

公开(公告)日：2018-04-11

申请号：EP02749361.8

申请日：2002-07-24

申请人： Samsung Electronics Co., Ltd.

发明人： SHIMODA, Tatsuya ,  UTSUNOMIYA, Sumio

IPC分类号： H01L27/12 ,  H01L27/00 ,  H01L21/52 ,  G02F1/133 ,  G09F9/00 ,  H01L27/118 ,  H01L27/13 ,  B82Y10/00 ,  H01L21/683 ,  B82Y30/00 ,  H01L29/66 ,  H01L27/108 ,  H01L27/11 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11517 ,  H01L27/11585 ,  H01L27/1159 ,  H05K3/04 ,  H01L51/56 ,  G02F1/13 ,  H01L27/32

CPC分类号： H01L27/1266 ,  B82Y10/00 ,  B82Y30/00 ,  G02F2001/13613 ,  H01L21/6835 ,  H01L21/6836 ,  H01L27/10844 ,  H01L27/11 ,  H01L27/11213 ,  H01L27/11502 ,  H01L27/11517 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/118 ,  H01L27/1214 ,  H01L27/13 ,  H01L27/3244 ,  H01L29/66757 ,  H01L29/66772 ,  H01L51/56 ,  H01L2221/68318 ,  H01L2221/68322 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/95 ,  H01L2225/06562 ,  H05K3/046

摘要： A transfer method comprising a step of forming a plurality of transferred bodies on a transfer origin substrate, and a step of applying energy to partial regions corresponding to the transferred bodies to be transferred, and transferring these transferred bodies corresponding to the partial regions onto a transfer destination substrate. A plurality of transferred bodies such as devices or circuits that are to be disposed on a transfer destination substrate with spaces therebetween can be manufactured integrated together on a transfer origin substrate, and hence compared with the case that the transferred bodies are formed on the transfer destination substrate directly, the amount of materials used in the manufacture of the transferred bodies can be reduced, the area efficiency can be greatly improved, and a transfer destination substrate on which a large number of devices or circuits are disposed in scattered locations can be manufactured efficiently and cheaply.

公开(公告)号：EP3971949A1

公开(公告)日：2022-03-23

申请号：EP21194905.2

申请日：2021-09-03

申请人： Renesas Electronics Corporation

发明人： TATEISHI, Kounosuke ,  MIZUSHIMA, Hiroaki

IPC分类号： H01L21/66 ,  H01L27/11517 ,  H01L29/423 ,  H01L29/66 ,  H01L29/788

摘要： A stacked-layer body including a gate insulating film and a control gate electrode is formed in a product region and a scribe region. Next, a gate insulating film and a conductive film are so formed that the stacked-layer body is covered. Next, an etching process is so performed to the conductive film that an upper surface of the conductive film is lower than that of an upper surface of the stacked-layer body, thereby forming a measurement pattern in the scribe region. Next, a memory gate electrode is formed by patterning the conductive film in the product region. Next, a silicide layer is formed on an upper surface of the memory gate electrode in the product region in a state where an upper surface of the measurement pattern is covered by an insulating film. Next, a resistance value of the measurement pattern covered by the insulating film is measured.

公开(公告)号：EP1794791B1

公开(公告)日：2019-12-18

申请号：EP05792907.7

申请日：2005-08-30

申请人： Micron Technology, Inc.

发明人： JUENGLING, Werner

IPC分类号： H01L27/108 ,  H01L21/336 ,  H01L29/423 ,  H01L27/105 ,  H01L29/66 ,  H01L29/78 ,  H01L27/11 ,  H01L27/115 ,  H01L27/11517

公开(公告)号：EP2565924B1

公开(公告)日：2018-01-10

申请号：EP12190201.9

申请日：2002-07-24

申请人： Samsung Electronics Co., Ltd.

发明人： Shimoda, Tatsuya ,  Utsunomiya, Sumio

IPC分类号： H01L27/11502 ,  H01L27/11517 ,  H01L27/11585 ,  H01L27/1159 ,  H01L21/683 ,  H01L27/12 ,  H01L27/00 ,  H01L21/52 ,  G02F1/133 ,  G09F9/00 ,  H01L27/118 ,  H01L27/13 ,  H05K3/04 ,  H01L27/11 ,  B82Y30/00 ,  B82Y10/00 ,  H01L27/108 ,  H01L21/336 ,  H01L27/112 ,  G02F1/136 ,  H01L51/56 ,  H01L27/32

CPC分类号： H01L27/1266 ,  B82Y10/00 ,  B82Y30/00 ,  G02F2001/13613 ,  H01L21/6835 ,  H01L21/6836 ,  H01L27/10844 ,  H01L27/11 ,  H01L27/11213 ,  H01L27/11502 ,  H01L27/11517 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/118 ,  H01L27/1214 ,  H01L27/13 ,  H01L27/3244 ,  H01L29/66757 ,  H01L29/66772 ,  H01L51/56 ,  H01L2221/68318 ,  H01L2221/68322 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/95 ,  H01L2225/06562 ,  H05K3/046

摘要： A transfer method comprising a step of forming a plurality of transferred bodies on a transfer origin substrate, and a step of applying energy to partial regions corresponding to the transferred bodies to be transferred, and transferring these transferred bodies corresponding to the partial regions onto a transfer destination substrate. A plurality of transferred bodies such as devices or circuits that are to be disposed on a transfer destination substrate with spaces therebetween can be manufactured integrated together on a transfer origin substrate, and hence compared with the case that the transferred bodies are formed on the transfer destination substrate directly, the amount of materials used in the manufacture of the transferred bodies can be reduced, the area efficiency can be greatly improved, and a transfer destination substrate on which a large number of devices or circuits are disposed in scattered locations can be manufactured efficiently and cheaply.