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    BIAS CIRCUIT AND POWER AMPLIFIER CIRCUIT
    3.
    发明公开
    BIAS CIRCUIT AND POWER AMPLIFIER CIRCUIT 审中-公开

    公开(公告)号：EP4398483A3

    公开(公告)日：2024-10-16

    申请号：EP24177413.2

    申请日：2019-08-29

    申请人： Telefonaktiebolaget LM Ericsson (publ)

    发明人： Elgaard, Christian ,  SJÖLAND, Henrik

    IPC分类号： H03F1/02 ,  H03F3/213 ,  H03F3/45 ,  H03F1/22

    摘要： A bias circuit (200) for a PA (100) is disclosed. It comprises a first transistor (M1) having its drain terminal and its gate terminal connected to a first circuit node (x) and its source terminal connected to a first supply terminal (GND), a first current source (I1) connected to the first circuit node (x), and a digitally controllable first resistor (R1) connected between the first circuit node (x) and a second circuit node (y). It further comprises a second transistor (M2) configured to receive a first component (RFinp) of a differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node (y) and its source terminal connected to a second supply terminal (VDD), and a third transistor (M3) configured to receive a second component (RFinn) of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node (y) and its source terminal connected to a second supply terminal (VDD). The gate terminals of the second transistor (M2) and the third transistor (M3) are configured to be biased by a digitally controllable first voltage (V1). The bias circuit is configured to generate a bias voltage (Vbias) for the PA (100) at the second circuit node (y).

    AMPLIFIER CIRCUIT FOR A DIGITAL POWER AMPLIFIER
    6.
    发明公开
    AMPLIFIER CIRCUIT FOR A DIGITAL POWER AMPLIFIER 审中-公开

    公开(公告)号：EP4439981A1

    公开(公告)日：2024-10-02

    申请号：EP23165924.4

    申请日：2023-03-31

    申请人： INTEL Corporation

    发明人： DEGANI, Ofir ,  SHAY, Naor Roi

    IPC分类号： H03F3/193 ,  H03F3/217 ,  H03F3/24 ,  H03F3/30

    CPC分类号： H03F3/2171 ,  H03F3/245 ,  H03F3/193 ,  H03F3/3015

    摘要： An amplifier circuit may include a plurality of transistors connected in series, the plurality of transistors including: a first transistor of a first conductivity type, a second transistor of the first conductivity type, and a third transistor of the first conductivity type coupled to the first transistor of the first conductivity type and the second transistor of the first conductivity type, the first transistor of the first conductivity type comprising a control terminal to receive a first signal varying between a first upper voltage level and a first lower voltage level; a first transistor of a second conductivity type, a second transistor of the second conductivity type, and a third transistor of the second conductivity type coupled to the first transistor of the second conductivity type and the second transistor of the second conductivity type, the first transistor of the second conductivity type comprising a control terminal to receive a second signal varying between a second upper voltage level and a second lower voltage level; an output terminal coupled to the second transistor of the first conductivity type and the second transistor of the second conductivity type, the output terminal is configured to provide an output signal varying between the first upper voltage level and the second lower voltage level; and a feedback circuit configured to provide signals that are in phase with the output signal to a control terminal of the third transistor of the first conductivity type and to a control terminal of the third transistor of the second conductivity type.

    CHOPPER-STABILIZED AMPLIFIER
    10.
    发明公开
    CHOPPER-STABILIZED AMPLIFIER 审中-公开

    公开(公告)号：EP4432559A1

    公开(公告)日：2024-09-18

    申请号：EP23218786.4

    申请日：2023-12-20

    申请人： Semiconductor Components Industries, LLC

    发明人： STANESCU, Cornel D. ,  VESELU, Adrian Constantin

    IPC分类号： H03F1/26 ,  H03F1/52 ,  H03F3/387 ,  H03F3/45 ,  H03F3/68

    CPC分类号： H03F3/45475 ,  H03F3/387 ,  H03F1/26 ,  H03F1/52 ,  H03F2203/4513820130101 ,  H03F3/68

    摘要： A high-voltage chopper-stabilized amplifier can include two paths to compensate for non-ideal electrical parameters. A first path, leading to a primary input of the amplifier, may include a first mux interface circuit to limit voltages at the primary input of the amplifier. A second path, leading to an auxiliary input of the amplifier, may include a chopper amplifier circuit. Despite the first mux interface circuit, a slew condition on the first path may excite a current in the second path that can negatively affect the signal source. Accordingly, the disclosed amplifier further includes a second mux interface circuit that can decouple the second path while a slew condition. The second mux interface circuit is driven by a window floating comparator, which is supplied according to the voltages on primary input. A settling enhancer circuit keeps, during slew condition, certain nodes on the second path at a reference voltage.