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    NEAR-ZERO LATENCY ANALOG BI-QUAD INFINITE IMPULSE RESPONSE FILTER
    1.
    发明公开
    NEAR-ZERO LATENCY ANALOG BI-QUAD INFINITE IMPULSE RESPONSE FILTER 审中-公开

    公开(公告)号：EP4220958A1

    公开(公告)日：2023-08-02

    申请号：EP22207765.3

    申请日：2022-11-16

    申请人： The Boeing Company

    发明人： Mentesana, Nicholas

    IPC分类号： H03H11/12 ,  H03H15/02 ,  H03H17/02 ,  H03H17/00

    摘要： Examples provide a method and apparatus for an analog bi-quad infinite impulse response, IIR, filter. An amplifier (108) generates a positive output signal (110) corresponding to a received RF signal and a negative output signal (112) . A set of selectively switchable time-delay circuits (114) associated with a positive arm of the filter causes a predetermined delay (116) corresponding to a desired sample frequency. A first set of configurable variable gain amplifiers (126) amplify the positive output signal to establish a set of positive coefficients (128). A set of selectively switchable time-delay circuits (118) associated with a negative arm of the filter causes a predetermined delay. A delayed negative output signal is generated which is amplified by a second set of configurable variable gain amplifiers (132) to establish a set of negative coefficients (134). A set of power combiners (130) function as sum junctions to combine the delayed positive output signals and the delayed negative output signals into a single output signal (136).

    LOW-POWER WIDEBAND ASYNCHRONOUS BINARY PHASE SHIFT KEYING DEMODULATION CIRCUIT USING PRIMARY SIDEBAND FILTERS ALIGNED WITH PHASE OF 180° AND HAVING REDUCED JITTER ACCORDING TO PHASE OF SIDEBAND DIFFERENTIAL OUTPUT COMPARATORS
    5.
    发明公开
    LOW-POWER WIDEBAND ASYNCHRONOUS BINARY PHASE SHIFT KEYING DEMODULATION CIRCUIT USING PRIMARY SIDEBAND FILTERS ALIGNED WITH PHASE OF 180° AND HAVING REDUCED JITTER ACCORDING TO PHASE OF SIDEBAND DIFFERENTIAL OUTPUT COMPARATORS 审中-公开

    公开(公告)号：EP3208984A4

    公开(公告)日：2017-10-11

    申请号：EP15850547

    申请日：2015-10-15

    申请人： WILKERSON BENJAMIN P

    发明人： WILKERSON BENJAMIN P

    IPC分类号： H04L27/233 ,  H03H7/18 ,  H03H7/30 ,  H03H11/04 ,  H03H17/00 ,  H03K3/023 ,  H03K5/1252 ,  H03K19/003 ,  H03K19/20 ,  H04B1/7163 ,  H04L7/033 ,  H04W4/00 ,  H04W84/18

    CPC分类号： H04L27/233 ,  H03K5/2481 ,  H03K19/01728 ,  H03K19/01855 ,  H03K19/0963 ,  H04L7/0278 ,  H04L27/2331 ,  H04L27/2334 ,  H04L27/2335 ,  H04W4/008

    摘要： An embodiment of the present invention relates to a low-power broadband asynchronous BPSK demodulation method and a configuration of a circuit thereof. In connection with a configuration of a BPSK demodulation circuit, there may be provided a low-power wideband asynchronous binary phase shift keying demodulation circuit comprising: a sideband separation and lower sideband signal delay unit for separating a modulated signal into an upper sideband and a lower sideband using a primary high pass filter, which has a carrier frequency as the cutoff frequency thereof, and a primary low pass filter and digitalizing the same into a positive phase and a negative phase such that, in connection with a digital output from a lower sideband comparator and a digital output from an upper sideband comparator, signals with opposite phases are compared at the same ascending edge and at the same descending edge between a symbol edge and another symbol edge, respectively, thereby reducing jitter to the largest extent, improving the yield ratio, and outputting lower sideband digital signals and upper sideband digital signals, the lower sideband digital signals having been delayed by the 1/4 frequency of the carrier frequency; a data demodulation unit for generating a first symbol edge signal detected by aligning the phase difference between a delayed lower sideband positive-phase digital signal and an upper sideband negative-phase digital signal to be 180° and generating a second symbol edge signal detected by aligning the phase difference between a delayed lower sideband negative-phase digital signal and an upper sideband positive-phase digital signal to be 180°, the data demodulation unit overlapping the first symbol edge signal and the second symbol edge signal through an AND gate, thereby reducing the glitch and generating a symbol edge clock, which has no glitch, through a deglitch filter, the data demodulation unit synchronizing the delayed lower sideband positive-phase digital signal with a descending edge of the symbol edge signal, thereby demodulating data; and a data clock restoration unit for generating a data clock using the delayed lower sideband positive-phase digital signal and the demodulated data signal.

    SAMPLING RATE CONVERSION DEVICE
    7.
    发明公开
    SAMPLING RATE CONVERSION DEVICE 有权
    DEVICE FOR采样转换

    公开(公告)号：EP2890008A1

    公开(公告)日：2015-07-01

    申请号：EP13831644.3

    申请日：2013-04-08

    申请人： NTT ELECTRONICS CORPORATION

    发明人： YAMADA, Yasuhiro ,  KOIKE, Yuichiro

    IPC分类号： H03H17/00

    CPC分类号： H03H17/0248 ,  H03H17/00 ,  H03H17/0642 ,  H03H17/0685

    摘要： A position coordinate difference calculation section (5) calculates a position coordinate difference between a position coordinate of an output digital signal and a position coordinate of an input digital signal close to it. An FIR coefficient memory (9) stores FIR coefficients of an FIR-LPF having such a characteristic as to cut off frequency components equal to or higher than 1/2 of an output sampling rate. When the position coordinate difference is input, the FIR coefficient memory outputs FIR coefficients corresponding to position coordinate differences between position coordinates of a certain number of input digital signals existing in the vicinity of the position coordinate of the output digital signal and the position coordinate of the output digital signal. AN FIR computation unit (3) performs FIR-LPF interpolation computation by using a certain number of the input digital signals and the FIR coefficients and obtains the output digital signal.

    AUDIO PROCESSING DEVICE AND AUDIO PROCESSING METHOD
    10.
    发明公开
    AUDIO PROCESSING DEVICE AND AUDIO PROCESSING METHOD 有权
    音频处理设备和音频处理方法

    公开(公告)号：EP2299368A1

    公开(公告)日：2011-03-23

    申请号：EP09738885.4

    申请日：2009-05-01

    申请人： Japan Science and Technology Agency

    发明人： TORAICHI, Kazuo ,  HIGUCHI, Masakazu ,  MOROOKA, Yasuo ,  NAKAMURA, Mitsuaki

    IPC分类号： G06F17/17 ,  G10L19/00 ,  G10L21/04 ,  H03H17/00 ,  H03H17/02 ,  H04R3/04

    CPC分类号： G10L19/04 ,  B60D1/58 ,  G06F17/17 ,  H03H17/0294 ,  H04S3/002

    摘要： There is provided a sound processing apparatus and a sound processing method which are capable of reproducing discrete data with a high-quality sound matching users' preferences. In a sound processing means 2, since an interpolation value reflecting a value of a variable parameter α by which the value of a control sampling function c 0 (t) is multiplied can be calculated, an analog signal obtained through the interpolation performed in a sampling function S N (t) can be regulated in accordance with the variable parameter α by changing the value of the variable parameter α. In this way, by allowing the user to appropriately change the variable parameter α in accordance with various conditions including music reproduction environments, sound sources, musical tones and so on, it becomes possible to reproduce high-quality-sound music in which its frequency characteristics of the analog signal have changed and a high quality desired by the user is obtained.

    摘要翻译： 提供了能够以匹配用户偏好的高质量声音再现离散数据的声音处理装置和声音处理方法。 在声音处理装置2中，由于可以计算反映控制采样函数c0（t）的值乘以的可变参数α的值的插值，所以通过在采样函数中执行插值而获得的模拟信号 通过改变可变参数α的值，可以根据可变参数α来调节SN（t）。 以这种方式，通过允许用户根据包括音乐再现环境，声音源，音乐音调等的各种条件适当地改变可变参数α，可以再现其中具有其频率特性的高品质音乐音乐 的模拟信号已经改变并且获得了用户所期望的高质量。