Flash type analog-to-digital converter
    2.
    发明专利
    Flash type analog-to-digital converter 有权
    闪光型模拟数字转换器

    公开(公告)号:JP2009021667A

    公开(公告)日:2009-01-29

    申请号:JP2007180793

    申请日:2007-07-10

    IPC分类号: H03M1/36

    摘要: PROBLEM TO BE SOLVED: To provide a flash type analog-to-digital converter capable of further improving a small-amplitude input characteristic after a large-amplitude input signal is input, and of executing a further high-speed circuit operation.
    SOLUTION: Each amplifier A1 of a first amplifier group 13 is formed into a differential amplifier having a differential pair comprising a set of a plurality of transistors cascode-connected to one another, and a first switch short-circuiting cascode connection parts of the plurality of transistors constituting the differential pair to each other is arranged. Each of amplifiers A2 and A3 of a second amplifier group 15 is formed into a differential amplifier having a differential pair comprising at least two transistors, and a second switch short-circuiting input parts of the differential pair to each other is arranged. First switch and the second switch is controlled in their opening and closing by a control clock at a predetermined cycle.
    COPYRIGHT: (C)2009,JPO&INPIT

    摘要翻译: 要解决的问题:提供一种能够在输入大幅度输入信号之后进一步改善小振幅输入特性的闪速型模数转换器,并且执行进一步的高速电路操作。 解决方案:第一放大器组13的每个放大器A1形成为具有差分对的差分放大器,差分对包括彼此串联连接的多个晶体管的一组,以及第一开关短路共源共栅连接部分 配置构成差分对的多个晶体管。 第二放大器组15的放大器A2和A3中的每一个形成为具有包括至少两个晶体管的差分对的差分放大器,并且布置彼此之间的差分对的第二开关短路输入部分。 第一开关和第二开关通过控制时钟以预定的周期被控制在它们的打开和关闭中。 版权所有(C)2009,JPO&INPIT

    Offset cancellation device
    3.
    发明专利
    Offset cancellation device 有权
    偏移消除装置

    公开(公告)号:JP2008258725A

    公开(公告)日:2008-10-23

    申请号:JP2007096295

    申请日:2007-04-02

    发明人: HIGUCHI KOUJI

    IPC分类号: H03F1/34 H03F3/34

    摘要: PROBLEM TO BE SOLVED: To provide an offset cancellation device capable of canceling offset even when a capacitive or resistance device is connected to the outside of an operational amplifier, and of outputting a signal during the canceling operation of offset.
    SOLUTION: This offset cancellation device is configured to run with the combination of output signals fewer in number than output signals to be output from a plurality of output circuits 16, each of which adjusts the gain of an input signal supplied to an operational amplifier 210. A selection output circuit 20 selects and outputs the prescribed number of output signals of a plurality of output circuits 16 necessary for driving the device. A judgement circuit 30 compares an output signal which has not been selected with a reference signal to adjust the gain of the output circuit 16, and cancels the offset of the operational amplifier 210. In the operation amplifier 210, a plurality of CAP groups are configured by combining feedback capacitors 226 by different number of aggregates, and whether or not those feedback capacitors function for each CAP group is switched until the judgement of normality is made by the judgement circuit 30.
    COPYRIGHT: (C)2009,JPO&INPIT

    摘要翻译: 要解决的问题:提供即使当电容或电阻装置连接到运算放大器的外部并且在偏移的抵消操作期间输出信号也能够抵消偏移的偏移消除装置。 解决方案:该偏移消除装置被配置为以多个输出信号的输出信号的数量少于要从多个输出电路16输出的输出信号的组合运行,每个输出电路16调整提供给操作的输入信号的增益 选择输出电路20选择并输出驱动装置所需的多个输出电路16的规定数量的输出信号。 判断电路30将未被选择的输出信号与参考信号进行比较,以调整输出电路16的增益,并且消除运算放大器210的偏移。在运算放大器210中,配置多个CAP组 通过将反馈电容器226组合为不同数目的聚合,并且这些反馈电容器是否对每个CAP组进行功能切换,直到判断电路30进行正常判断为止。(C)2009,JPO&INPIT

    Traveling wave amplifier
    5.
    发明专利
    Traveling wave amplifier 审中-公开
    行驶波形放大器

    公开(公告)号:JP2013239952A

    公开(公告)日:2013-11-28

    申请号:JP2012112354

    申请日:2012-05-16

    摘要: PROBLEM TO BE SOLVED: To provide a traveling wave amplifier that reduces jitter in an output signal.SOLUTION: A traveling wave amplifier 10 has two or more differential amplification circuits 12a, 12b, 12c, whose input terminals are connected to delay lines Lin1, Lin2 for receiving input signals with different delay times and whose output terminals are connected to delay lines Lout1, Lout2 for outputting output signals with different delay times. In the traveling wave amplifier, the differential amplification circuits 12a, 12b, 12c each have differential pair transistors Tr3, Tr4, a pair of cascode transistors Tr5, Tr6 connected in series with the differential pair transistors Tr3, Tr4, respectively, and current sources I5, I6 for supplying currents to current terminals of the pair of cascode transistors Tr5, Tr6 irrespective of switching states of the differential pair transistors Tr3, Tr4.

    摘要翻译: 要解决的问题:提供一种降低输出信号抖动的行波放大器。解决方案:行波放大器10具有两个或更多个差分放大电路12a,12b,12c,其输入端子连接到延迟线Lin1,Lin2 用于接收具有不同延迟时间的输入信号,其输出端连接到延迟线Lout1,Lout2,用于输出具有不同延迟时间的输出信号。 在行波放大器中,差分放大电路12a,12b,12c分别具有差分对晶体管Tr3,Tr4,分别与差分对晶体管Tr3,Tr4串联连接的一对共源共栅晶体管Tr5,Tr6,以及电流源I5 ,I6,用于向一对共源共栅晶体管Tr5,Tr6的电流端子提供电流,而与差分对晶体管Tr3,Tr4的开关状态无关。

    Amplifier circuit and a/d converter
    6.
    发明专利
    Amplifier circuit and a/d converter 审中-公开
    放大器电路和A / D转换器

    公开(公告)号:JP2010147992A

    公开(公告)日:2010-07-01

    申请号:JP2008325466

    申请日:2008-12-22

    IPC分类号: H03F1/22 H03F3/45 H03M1/44

    摘要: PROBLEM TO BE SOLVED: To reduce a starting time and suppress an increase of electric power consumption.
    SOLUTION: The amplifier circuit includes a current source 101 which is connected between a power-supply voltage Vdd and an output node Vy and goes on when a switching control signal has a first value or goes off when it has a second value, a grounded voltage control current source 104 for which an amount of current is controlled by an input voltage Vin, a cascode transistor 102 connected between the voltage control current source and the output node, a boost amplifier 103 connected between a gate electrode and a source electrode of the cascode transistor, and a switch SW13 which is connected between an output node of the boost amplifier and a bias voltage Vb and goes on for a predetermined time period along with a change of the value of the switching control signal from the second value to the first value to force the boost amplifier to start up.
    COPYRIGHT: (C)2010,JPO&INPIT

    摘要翻译: 要解决的问题:为了减少启动时间并抑制电力消耗的增加。 解决方案:放大器电路包括连接在电源电压Vdd和输出节点Vy之间的电流源101,当切换控制信号具有第一值或当其具有第二值时,其断开, 接地电压控制电流源104,其电流量由输入电压Vin,连接在电压控制电流源和输出节点之间的共源共栅晶体管102,连接在栅电极和源极之间的升压放大器103 并且连接在升压放大器的输出节点和偏置电压Vb之间的开关SW13,并且随着开关控制信号的值从第二值的变化而变化到预定时间段 第一个值强制升压放大器启动。 版权所有(C)2010,JPO&INPIT

    Amplifier circuit and display device
    8.
    发明专利
    Amplifier circuit and display device 审中-公开
    放大器电路和显示器件

    公开(公告)号:JP2009042428A

    公开(公告)日:2009-02-26

    申请号:JP2007206224

    申请日:2007-08-08

    发明人: SHIMATANI ATSUSHI

    IPC分类号: G09G3/36 G02F1/133 G09G3/20

    摘要: PROBLEM TO BE SOLVED: To provide an amplifier circuit and a display device (for example, a liquid crystal display device) capable of achieving a smaller area and reduction in power consumption while maintaining characteristics without incorporating complicated logics compared to conventional amplifier circuits and display devices. SOLUTION: The amplifier circuit and the display device (for example, a liquid crystal display device) include a voltage follower that is decomposed into structural elements comprising an input stage amplification section for a high voltage, an input stage amplification section for a low voltage and a plurality of output stage amplification sections, in which the output relationship in the plurality of output stage amplification sections is changed in accordance with control signals while the input relationship in the input stage amplification section for a high voltage and the input stage amplification section for a low voltage is not changed. Furthermore, when the input stage amplification section and the output stage amplification section are combined as one amplification section, amplification sections are changed through switches so as to allow the amplification section to configure a voltage follower. COPYRIGHT: (C)2009,JPO&INPIT

    摘要翻译: 要解决的问题:提供一种放大器电路和显示装置(例如液晶显示装置),其能够实现更小的面积和降低功耗,同时保持特性而不需要复杂的逻辑与传统放大器电路相比较 和显示设备。 解决方案:放大器电路和显示装置(例如,液晶显示装置)包括被分解成包括用于高电压的输入级放大部分的结构元件的电压跟随器,用于高电压的输入级放大部分 低电压和多个输出级放大部分,其中多个输出级放大部分中的输出关系根据控制信号而改变,而输入级放大部分中用于高电压的输入关系和输入级放大 低电压的部分不改变。 此外,当输入级放大部分和输出级放大部分组合为一个放大部分时,通过开关改变放大部分,以便允许放大部分构成电压跟随器。 版权所有(C)2009,JPO&INPIT

    Amplifying circuit of semiconductor integrated circuit
    10.
    发明专利
    Amplifying circuit of semiconductor integrated circuit 审中-公开
    半导体集成电路放大电路

    公开(公告)号:JP2008048407A

    公开(公告)日:2008-02-28

    申请号:JP2007210073

    申请日:2007-08-10

    发明人: HA SUNG-JOO

    IPC分类号: H03K5/02 G11C11/419 H03K3/356

    摘要: PROBLEM TO BE SOLVED: To provide an amplifying circuit of a semiconductor integrated circuit that is capable of improving amplifying efficiency and reducing the size of an area used.
    SOLUTION: The amplifying circuit of the semiconductor integrated circuit includes a data amplifier that outputs an up-signal and a down-signal amplified according to a comparison result between an up-data and a down-data signal in response to a control signal, and repeats an operation of amplifying the up-signal and the down-signal according to the comparison result between the up-signal an the down-signal to be fed back to the data amplifier.
    COPYRIGHT: (C)2008,JPO&INPIT

    摘要翻译: 要解决的问题:提供能够提高放大效率并减小所使用区域的尺寸的半导体集成电路的放大电路。 解决方案:半导体集成电路的放大电路包括数据放大器,其响应于控制而输出根据上位数据和下行数据信号之间的比较结果放大的上信号和下降信号 信号,并且根据要反馈到数据放大器的下降信号的上升信号之间的比较结果,重复放大上行信号和下降信号的操作。 版权所有(C)2008,JPO&INPIT