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    Semiconductor device having a multi-channel type MOS transistor
    1.
    发明授权
    Semiconductor device having a multi-channel type MOS transistor 有权
    具有多沟道型MOS晶体管的半导体器件

    公开(公告)号：US08129777B2

    公开(公告)日：2012-03-06

    申请号：US12659008

    申请日：2010-02-23

    Applicant: Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    Inventor： Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC classification number: H01L29/78696 ,  H01L29/42392 ,  H01L29/66787

    Abstract: In a method of manufacturing a semiconductor device, an active channel pattern is formed on a substrate. The active channel pattern includes preliminary gate patterns and single crystalline silicon patterns that are alternately stacked with each other. A source/drain layer is formed on a sidewall of the active channel pattern. Mask pattern structures including a gate trench are formed on the active channel pattern and the source/drain layer. The patterns are selectively etched to form tunnels. The gate trench is then filled with a gate electrode. The gate electrode surrounds the active channel pattern. The gate electrode is protruded from the active channel pattern. The mask pattern structures are then removed. Impurities are implanted into the source/drain regions to form source/drain regions. A silicidation process is carried out on the source/drain regions to form a metal silicide layer, thereby completing a semiconductor device having a MOS transistor.

    Abstract translation: 在制造半导体器件的方法中，在衬底上形成有源沟道图案。 有源沟道图案包括彼此交替堆叠的初步栅极图案和单晶硅图案。 源极/漏极层形成在有源沟道图案的侧壁上。 在有源沟道图案和源极/漏极层上形成包括栅极沟槽的掩模图案结构。 选择性地蚀刻图案以形成隧道。 然后用栅电极填充栅极沟槽。 栅电极围绕有源沟道图案。 栅电极从有源沟道图案突出。 然后去除掩模图案结构。 将杂质注入源/漏区以形成源/漏区。 在源极/漏极区域上进行硅化处理以形成金属硅化物层，从而完成具有MOS晶体管的半导体器件。

    MULTIBIT ELECTRO-MECHANICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    MULTIBIT ELECTRO-MECHANICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
    多电子机电存储器件及其制造方法

    公开(公告)号：US20110230001A1

    公开(公告)日：2011-09-22

    申请号：US13116374

    申请日：2011-05-26

    Applicant: Eun-Jung Yun ,  Min-Sang Kim ,  Sung-Min Kim ,  Sung-Young Lee ,  Ji-Myoung Lee ,  In-Hyuk Choi

    Inventor： Eun-Jung Yun ,  Min-Sang Kim ,  Sung-Min Kim ,  Sung-Young Lee ,  Ji-Myoung Lee ,  In-Hyuk Choi

    IPC: H01L21/00

    CPC classification number: H01L27/10 ,  G11C11/50 ,  H01L27/115

    Abstract: A multibit electro-mechanical memory device comprises a substrate, a bit line on the substrate, a first interlayer insulating film on the bit line, first and second lower word lines on the first interlayer insulating film, the first and second lower word lines separated horizontally from each other by a trench, a spacer abutting a sidewall of each of the first and second lower word lines, a pad electrode inside a contact hole, first and second cantilever electrodes suspended over first and second lower voids that correspond to upper parts of the first and second lower word lines provided in both sides on the pad electrode, the first and second cantilever electrodes being separated from each other by the trench, and being curved in a third direction that is perpendicular to the first and second direction; a second interlayer insulating film on the pad electrode, first and second trap sites supported by the second interlayer insulating film to have first and second upper voids on the first and second cantilever electrodes, and first and second upper word lines on the first and second trap sites.

    Abstract translation: 多位机电存储器件包括衬底，衬底上的位线，位线上的第一层间绝缘膜，第一层间绝缘膜上的第一和第二下字线，第一和第二下字线水平分开 通过沟槽彼此相邻的间隔件，邻接第一和第二下部字线中的每一个的侧壁的间隔件，接触孔内的焊盘电极，悬挂在第一和第二下部空隙中的第一和第二悬臂电极，其对应于 第一和第二下部字线设置在焊盘电极的两侧，第一和第二悬臂电极通过沟槽彼此分离，并且在垂直于第一和第二方向的第三方向上弯曲; 在所述焊盘电极上的第二层间绝缘膜，由所述第二层间绝缘膜支撑的第一和第二陷阱位置，以在所述第一和第二悬臂电极上具有第一和第二上部空隙，以及在所述第一和第二阱上的第一和第二上部字线 网站。

    Security authentication system and method
    3.
    发明授权
    Security authentication system and method 有权
    安全认证系统和方法

    公开(公告)号：US08024559B2

    公开(公告)日：2011-09-20

    申请号：US12098642

    申请日：2008-04-07

    Applicant: Young-Sik Jung ,  In-Hyuk Choi ,  Min-Chol Song ,  Jong-Won Paek ,  Sung-Ho Lee ,  Sang-Hee Bang ,  Sang-Hun Jeon

    Inventor： Young-Sik Jung ,  In-Hyuk Choi ,  Min-Chol Song ,  Jong-Won Paek ,  Sung-Ho Lee ,  Sang-Hee Bang ,  Sang-Hun Jeon

    IPC: H04L29/06 ,  H04L9/32 ,  G06F15/173 ,  G06F7/04 ,  G06F17/30 ,  H04N7/16

    CPC classification number: H04L63/08 ,  G06F21/33 ,  H04L9/321 ,  H04L9/3226 ,  H04L9/3271 ,  H04L63/105 ,  H04L63/20

    Abstract: Authentication system and method are provided. The authentication system includes: a server configured to provide at least two security levels and configured to transmit one of at least two security modules corresponding to the security level of a user terminal, via communications network, to the user terminal based, at least in part, upon an environment of the user terminal; and an authentication server communicatively linked with the server and configured to perform a user authentication in response to a user authentication request from the user terminal. Accordingly, various hackings can be prevented and the user authentication can be accomplished with user's convenience and security.

    Abstract translation: 提供认证系统和方法。 所述认证系统包括：被配置为提供至少两个安全级别并被配置为至少部分地通过通信网络将与用户终端的安全级别对应的至少两个安全模块中的一个发送到所述用户终端的服务器 在用户终端的环境下; 以及与所述服务器通信地链接并被配置为响应于来自所述用户终端的用户认证请求执行用户认证的认证服务器。 因此，可以防止各种黑客攻击，并且可以用户的方便和安全性来实现用户认证。

    Multibit electro-mechanical memory device having cantilever electrodes
    4.
    发明授权
    Multibit electro-mechanical memory device having cantilever electrodes 失效
    具有悬臂电极的多位机电记忆装置

    公开(公告)号：US07973343B2

    公开(公告)日：2011-07-05

    申请号：US12154473

    申请日：2008-05-23

    Applicant: Eun-Jung Yun ,  Min-Sang Kim ,  Sung-Min Kim ,  Sung-Young Lee ,  Ji-Myoung Lee ,  In-Hyuk Choi

    Inventor： Eun-Jung Yun ,  Min-Sang Kim ,  Sung-Min Kim ,  Sung-Young Lee ,  Ji-Myoung Lee ,  In-Hyuk Choi

    IPC: H01L29/66 ,  H01L29/84 ,  H01L21/00

    CPC classification number: H01L27/10 ,  G11C11/50 ,  H01L27/115

    Abstract: A multibit electro-mechanical memory device comprises a substrate, a bit line on the substrate, a first interlayer insulating film on the bit line, first and second lower word lines on the first interlayer insulating film, the first and second lower word lines separated horizontally from each other by a trench, a spacer abutting a sidewall of each of the first and second lower word lines, a pad electrode inside a contact hole, first and second cantilever electrodes suspended over first and second lower voids that correspond to upper parts of the first and second lower word lines provided in both sides on the pad electrode, the first and second cantilever electrodes being separated from each other by the trench, and being curved in a third direction that is perpendicular to the first and second direction; a second interlayer insulating film on the pad electrode, first and second trap sites supported by the second interlayer insulating film to have first and second upper voids on the first and second cantilever electrodes, and first and second upper word lines on the first and second trap sites.

    Abstract translation: 多位机电存储器件包括衬底，衬底上的位线，位线上的第一层间绝缘膜，第一层间绝缘膜上的第一和第二下字线，第一和第二下字线水平分开 通过沟槽彼此相邻的间隔件，邻接第一和第二下部字线中的每一个的侧壁的间隔件，接触孔内的焊盘电极，悬挂在第一和第二下部空隙中的第一和第二悬臂电极，其对应于 第一和第二下部字线设置在焊盘电极的两侧，第一和第二悬臂电极通过沟槽彼此分离，并且在垂直于第一和第二方向的第三方向上弯曲; 在所述焊盘电极上的第二层间绝缘膜，由所述第二层间绝缘膜支撑的第一和第二陷阱位置，以在所述第一和第二悬臂电极上具有第一和第二上部空隙，以及在所述第一和第二阱上的第一和第二上部字线 网站。

    Methods of forming a pattern and methods of manufacturing a memory device using the same
    8.
    发明申请
    Methods of forming a pattern and methods of manufacturing a memory device using the same 有权
    形成图案的方法和使用该图案的存储器件的制造方法

    公开(公告)号：US20080081442A1

    公开(公告)日：2008-04-03

    申请号：US11605266

    申请日：2006-11-29

    Applicant: Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    Inventor： Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    IPC: H01L21/20

    CPC classification number: H01L27/115 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02664 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/66795 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/792

    Abstract: In a method of forming a pattern, a sacrificial layer pattern and a stop layer pattern for preventing or reducing an epitaxial growth may be formed on a substrate. The sacrificial layer pattern may have a first hole therethrough, and the first hole partially exposes a top surface of the substrate. At least one active pattern may be formed on a bottom and a sidewall of the first hole by performing a selective epitaxial growth process on the top surface of the substrate and a sidewall of the sacrificial layer pattern. The sacrificial layer pattern and the stop layer pattern for preventing or reducing the epitaxial growth may be removed from the substrate. The at least one active pattern formed by the above method may have a finer size and an improved shaped compared to a conventional active pattern formed by directly patterning layers using a photoresist pattern. Damages in a photolithography process may be prevented or reduced from being generated.

    Abstract translation: 在形成图案的方法中，可以在基板上形成用于防止或减少外延生长的牺牲层图案和停止层图案。 牺牲层图案可以具有穿过其的第一孔，并且第一孔部分地暴露衬底的顶表面。 通过在衬底的顶表面和牺牲层图案的侧壁上执行选择性外延生长工艺，可以在第一孔的底部和侧壁上形成至少一个活性图案。 可以从衬底去除用于防止或减少外延生长的牺牲层图案和停止层图案。 与通过使用光致抗蚀剂图案直接图案化图案形成的常规有源图案相比，通过上述方法形成的至少一个有源图案可以具有更细的尺寸和改进的形状。 可以防止或减少光刻工艺中的损伤。

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