Closed loop sputtering controlled to enhance electrical characteristics in deposited layer
    1.
    发明授权
    Closed loop sputtering controlled to enhance electrical characteristics in deposited layer 有权
    控制闭环溅射以增强沉积层中的电特性

    公开(公告)号:US08895951B2

    公开(公告)日:2014-11-25

    申请号:US13249631

    申请日:2011-09-30

    摘要: This disclosure provides a method of fabricating a semiconductor device layer and an associated memory cell. Empirical data may be used to generate a hysteresis curve associated with deposition for a metal-insulator-metal structure, with curve measurements reflecting variance of an electrical property as a function of cathode voltage used during a sputtering process. By generating at least one voltage level to be used during the sputtering process, where the voltage reflects a suitable value for the electrical property from among the values obtainable in mixed-mode deposition, a semiconductor device layer may be produced with improved characteristics and durability. A multistable memory cell or array of such cells manufactured according to this process can, for a set of given materials, be fabricated to have minimal leakage or “off” current characteristics (Ileak or Ioff, respectively) or a maximum ratio of “on” current to “off” current (Ion/Ioff).

    摘要翻译: 本公开提供了制造半导体器件层和相关联的存储单元的方法。 经验数据可用于产生与金属 - 绝缘体 - 金属结构的沉积相关联的滞后曲线,其中曲线测量反映作为在溅射过程中使用的阴极电压的函数的电特性的变化。 通过在溅射过程中产生要使用的至少一个电压电平,其中电压从混合模式沉积中可获得的值中反映适合的电特性值,可以制造具有改进的特性和耐久性的半导体器件层。 根据该方法制造的这种电池的多电平存储器单元或阵列可以针对一组给定材料制造为具有最小的泄漏或“截止”电流特性(分别为Ileak或Ioff)或最大“on” 电流“off”电流(Ion / Ioff)。