Abstract:
A display apparatus includes a panel part, a data driver, and a gate driver. The panel part includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels each of which is connected to one gate line of the gate lines and one data line of the data lines. The data driver receives image data and outputs a data signal to the data lines. The gate driver part is disposed on the panel part and applies gate signals to the gate lines. Periods of clock signals controlling the level of the gate signals are different from that of the gate signals. Thus, power consumption of the display apparatus is substantially effectively reduced.
Abstract:
A display panel includes a display area, a peripheral area which includes a first peripheral area, and a second peripheral area opposite to the first peripheral area, a plurality of pixels in the display area, a plurality of data lines, a first gate line, a second gate line, a first gate driving circuit and a second gate driving circuit. Each data line corresponds to two pixel columns. The first gate line is at a first side of a pixel row. The second gate line is at a second side of the pixel row. The first gate driving circuit is in the first peripheral area and includes a first stage which provides a gate signal to the first gate line. The second gate driving circuit is in a second peripheral area of the display area and includes a second stage which provides a gate signal to the second gate line.
Abstract:
A light source device includes a light source module having a light-emitting block, an image analysis part, a duty ratio calculation part, a duty ratio determination part and a signal generation part. The image analysis part extracts representative luminance data of the light-emitting block based on pixel data. The duty ratio calculation part calculates duty ratio data of the light-emitting block based on the representative luminance data. The duty ratio determination part generates determined duty ratio data of the light-emitting block based on the duty ratio data from a first period, and the signal generation part generates a driving signal having a duty ratio corresponding to the determined duty ratio data to drive the light-emitting block.
Abstract:
A voltage generating circuit includes a first charge pumping part and a second charge pumping part. The first charge pumping part pumps a switching voltage, in response to a reference voltage, to output a first voltage. The second charge pumping part pumps the switching voltage, in response to the first voltage, to output a second voltage that is lower than the first voltage that is varied in accordance with time.
Abstract:
A gate drive circuit includes a plurality of driving stages. An n-th (‘n’ is a natural number) driving stage includes a pull-up part, a carry part, a first pull-down part, a first pull-up/down control part and a second pull-up/down control part. The first pull-up/down control part applies a first power signal of an ON voltage to a control terminal of the pull-up part in a forward direction mode, and applies the first power signal of a second OFF voltage to a control terminal of the pull-up part in a reverse direction mode. The second pull-up/down control part applies a second power signal of the second OFF voltage to the control terminal of the pull-up part in the forward direction mode, and applies the second power signal of the ON voltage to the control terminal of the pull-up part in the reverse direction mode.
Abstract:
A display device includes a display panel, a data driving part and a gate driving part. The display panel includes a first pixel row. The first pixel row includes a first pixel connected to an (n+1)-th gate line and an (m+1)-th data line (where ‘n’ and ‘m’ are natural numbers), and a second pixel connected to an n-th gate line and an (m+2)-th data line. The data driving part applies a data voltage having a first polarity with respect to a reference voltage to the (m+1)-th data line, and applies a data voltage having a second polarity with respect to the reference voltage to the (m+2)-th data line. The gate driving part sequentially applies a gate signal to the n-th gate line and the (n+1)-th gate line.
Abstract:
A gate drive circuit includes a plurality of driving stages. An n-th (‘n’ is a natural number) driving stage includes a pull-up part, a carry part, a first pull-down part, a first pull-up/down control part and a second pull-up/down control part. The first pull-up/down control part applies a first power signal of an ON voltage to a control terminal of the pull-up part in a forward direction mode, and applies the first power signal of a second OFF voltage to a control terminal of the pull-up part in a reverse direction mode. The second pull-up/down control part applies a second power signal of the second OFF voltage to the control terminal of the pull-up part in the forward direction mode, and applies the second power signal of the ON voltage to the control terminal of the pull-up part in the reverse direction mode.
Abstract:
A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.
Abstract:
A display apparatus includes a gate driver, a data driver, a display panel, a power supply and a common voltage line. The gate driver outputs a gate signal, and the data driver outputs a data signal. The display panel includes a display area displaying images in response to the gate signal and the data signal, and a peripheral area surrounding the display area. The power supply generates a common voltage and supplies the common voltage to the display panel. The common voltage line is disposed in the peripheral area surrounding the display area. and the common voltage line has two ends adjacent to the power supply. One of the two ends, which is disposed farther away from the gate driver, is connected to the power supply to receive the common voltage. Accordingly, the common voltage is differentially applied according to a length of the common voltage line.
Abstract:
A display panel includes a display area, a peripheral area which includes a first peripheral area, and a second peripheral area opposite to the first peripheral area, a plurality of pixels in the display area, a plurality of data lines, a first gate line, a second gate line, a first gate driving circuit and a second gate driving circuit. Each data line corresponds to two pixel columns. The first gate line is at a first side of a pixel row. The second gate line is at a second side of the pixel row. The first gate driving circuit is in the first peripheral area and includes a first stage which provides a gate signal to the first gate line. The second gate driving circuit is in a second peripheral area of the display area and includes a second stage which provides a gate signal to the second gate line.