公开(公告)号：US08963818B2

公开(公告)日：2015-02-24

申请号：US13212782

申请日：2011-08-18

申请人： Chang-Sin Kim ,  Byeong-Doo Kang ,  Yong-Soon Lee ,  Ock-Jin Kim ,  Sang-Gon Lee

发明人： Chang-Sin Kim ,  Byeong-Doo Kang ,  Yong-Soon Lee ,  Ock-Jin Kim ,  Sang-Gon Lee

IPC分类号： G09G3/36 ,  G02F1/1343

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G2300/0413 ,  G09G2310/0232

摘要： A display panel includes a plurality of data lines, a plurality of gate lines, a plurality of dummy loads, a pad portion and a fanout portion. The data lines are disposed in a display area, on which a plurality of pixels are disposed. The gate lines are disposed in the display area and cross the data lines. The dummy loads are disposed in a peripheral area surrounding the display area. The pad portion is disposed in the peripheral area and includes signal pads and dummy pads. The fanout portion includes a first fanout line portion connecting the data lines to the signal pads, and a second fanout line portion connecting the dummy loads to the dummy pads.

摘要翻译： 显示面板包括多条数据线，多条栅极线，多个虚拟负载，焊盘部分和扇出部分。 数据线设置在其上设置有多个像素的显示区域中。 栅极线设置在显示区域中并与数据线交叉。 虚拟负载设置在显示区域周围的周边区域中。 焊盘部分设置在周边区域中，并且包括信号焊盘和虚拟焊盘。 扇出部分包括将数据线连接到信号焊盘的第一扇出线部分和将虚拟负载连接到虚拟焊盘的第二扇出线部分。

公开(公告)号：US08730146B2

公开(公告)日：2014-05-20

申请号：US12539032

申请日：2009-08-11

申请人： Yong-Soon Lee

发明人： Yong-Soon Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G2330/02

摘要： A drive voltage generating circuit which has a first shifter receiving an input voltage and outputting a first drive voltage obtained by first shifting a voltage level of the input voltage; a second shifter receiving outputting the second drive voltage obtained by second shifting a voltage level of the first drive voltage; and a drive voltage controller adjusting one of a shifting amount of the first shifter and a shifting amount of the second shifter in accordance with a surrounding temperature, wherein the second drive voltage is continuously varied in an analog manner, in accordance with the surrounding temperature.

摘要翻译： 驱动电压产生电路，其具有接收输入电压的第一移位器，并输出通过首先移位输入电压的电压电平而获得的第一驱动电压; 接收第二移位器，接收输出通过第二移位第一驱动电压的电压电平而获得的第二驱动电压; 以及驱动电压控制器，其根据周围温度调整第一移位器的移位量和移位量中的一个，其中第二驱动电压根据周围温度以模拟方式连续变化。

公开(公告)号：US08558776B2

公开(公告)日：2013-10-15

申请号：US11999329

申请日：2007-12-04

申请人： Min-Cheol Lee ,  Hee-Bum Park ,  Yong-Soon Lee ,  Seung-Soo Baek ,  Sang-Jin Jeon

发明人： Min-Cheol Lee ,  Hee-Bum Park ,  Yong-Soon Lee ,  Seung-Soo Baek ,  Sang-Jin Jeon

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3677 ,  G09G2320/0223

摘要： In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

摘要翻译： 在具有显示面板的显示面板和显示装置中，显示面板包括阵列和相对的基板。 阵列基板包括显示器和外围区域。 栅极和源极线形成在显示区域中。 在周边区域中形成栅极驱动部分和第一和第二时钟线。 栅极驱动部分将栅极信号输出到栅极线。 第一和第二时钟线分别将第一和第二时钟信号发送到门驱动部分。 相对的衬底与阵列衬底组合并且包括公共电极层。 公共电极层具有图案化以暴露第一和第二时钟线的开口部分。 第一和第二时钟线的暴露部分具有基本上相同的面积。 因此，可以使门信号的延迟最小化并且可以防止门信号的失真。

公开(公告)号：US09672782B2

公开(公告)日：2017-06-06

申请号：US12949931

申请日：2010-11-19

申请人： Jae-Hoon Lee ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Young-Su Kim ,  Chang-Ho Lee ,  Whee-Won Lee ,  Jun-Yong Song ,  Yu-Han Bae

发明人： Jae-Hoon Lee ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Young-Su Kim ,  Chang-Ho Lee ,  Whee-Won Lee ,  Jun-Yong Song ,  Yu-Han Bae

IPC分类号： G09G3/36 ,  G11C19/00 ,  G11C19/28

CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/28

摘要： A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

公开(公告)号：US09659542B2

公开(公告)日：2017-05-23

申请号：US11230112

申请日：2005-09-19

申请人： Haeng-Won Park ,  Seung-Hwan Moon ,  Nam-Soo Kang ,  Sung-Jae Moon ,  Sung-Man Kim ,  Seong-Young Lee ,  Yong-Soon Lee

发明人： Haeng-Won Park ,  Seung-Hwan Moon ,  Nam-Soo Kang ,  Sung-Jae Moon ,  Sung-Man Kim ,  Seong-Young Lee ,  Yong-Soon Lee

IPC分类号： G09G5/00 ,  G09G3/36 ,  G11C19/18

CPC分类号： G09G3/3677 ,  G09G2300/0426 ,  G11C19/184

摘要： A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.

公开(公告)号：US20130055926A1

公开(公告)日：2013-03-07

申请号：US13697642

申请日：2010-07-09

申请人： Yong-Soon Lee ,  Mu-Sik Noh

发明人： Yong-Soon Lee ,  Mu-Sik Noh

IPC分类号： C04B32/02

CPC分类号： C04B18/16 ,  B29B17/02 ,  B29B2017/0496 ,  B29K2105/16 ,  B29K2433/12 ,  B29K2995/002 ,  B29K2995/0021 ,  C04B18/20 ,  C04B20/02 ,  Y02W30/622 ,  Y02W30/625 ,  Y02W30/95 ,  Y02W30/96 ,  C04B20/026 ,  C04B2111/545

摘要： Provided is a method of recycling waste scagliola, which includes a pre-treating step, a pyrolysing step, a resin recycling step, and a filler recycling step. The pre-treating step includes storing the waste scagliola of a dry dust type, drying and storing the waste scagliola of a wet dust type, or pulverizing and storing the waste scagliola of a scrap type. The pyrolysing step includes receiving and heating a recycling raw material stored in the dust or granular type in the pre-treating step, and decomposing the raw material into a resin mixed gas and a filler mixed solid material. The resin recycling step includes receiving the resin mixed gas decomposed in the pyrolysing step, and recycling a resin from which impurities are removed by a purifying process. The filler recycling step includes receiving the filler mixed solid material decomposed in the pyrolysing step, and recycling a filler from which impurities are removed by a firing process. Thereby, the resin and filler are more effectively recycled from the waste scagliola, so that it is possible to prevent environmental pollution caused by disposing the waste scagliola, and to enhance an effect of reducing resource waste according to resource recycling.

摘要翻译： 本发明提供了一种回收废弃锯齿刀的方法，其包括预处理步骤，热解步骤，树脂再循环步骤和填料再循环步骤。 预处理步骤包括储存干粉尘类型的废弃草皮，干燥并储存湿粉尘类型的废弃草皮，或粉碎和储存废料类型的废弃草药。 热解步骤包括在预处理步骤中接收和加热储存在粉尘或颗粒状的再循环原料，并将原料分解成树脂混合气体和填料混合固体材料。 树脂再循环步骤包括接收在热解步骤中分解的树脂混合气体，并通过净化处理循环除去杂质的树脂。 填料回收步骤包括接收在热解步骤中分解的填料混合固体材料，以及再循环通过焙烧过程除去杂质的填料。 由此，能够更有效地从废弃锯屑回收树脂和填料，从而可以防止由于处置废弃物而造成的环境污染，并且能够提高根据资源回收而减少资源浪费的效果。

公开(公告)号：US20120188224A1

公开(公告)日：2012-07-26

申请号：US13278683

申请日：2011-10-21

申请人： Sang-Gon LEE ,  Ock-Jin KIM ,  Yong-Soon LEE ,  Chang-Sin KIM

发明人： Sang-Gon LEE ,  Ock-Jin KIM ,  Yong-Soon LEE ,  Chang-Sin KIM

IPC分类号： G06F3/038

CPC分类号： G09G3/20 ,  G09G3/3688 ,  G09G2310/0275 ,  G09G2310/0291 ,  G09G2320/0252 ,  G09G2330/021 ,  G09G2340/16

摘要： A data processing method for a display apparatus includes comparing data signals outputted to a first data line and a second data line of a plurality of data lines of a data driving circuit in the display apparatus to generate an output buffer control signal, and outputting output signals from at least one amplifier of a plurality of amplifiers of an output buffer in the data driving circuit to the first data line and the second data line, where the at least one amplifier is selected based on the output buffer control signal.

摘要翻译： 一种显示装置的数据处理方法，包括比较输出到第一数据线的数据信号和显示装置中的数据驱动电路的多条数据线的第二数据线，以产生输出缓冲器控制信号，并输出输出信号 从数据驱动电路中的输出缓冲器的多个放大器的至少一个放大器到第一数据线和第二数据线，其中基于输出缓冲器控制信号选择至少一个放大器。

公开(公告)号：US20100265238A1

公开(公告)日：2010-10-21

申请号：US12762470

申请日：2010-04-19

申请人： Jae-Hoon LEE ,  Yong-Soon LEE ,  Young-Su KIM ,  Yu-Han BAE

发明人： Jae-Hoon LEE ,  Yong-Soon LEE ,  Young-Su KIM ,  Yu-Han BAE

IPC分类号： G06F3/038 ,  H01J9/00

CPC分类号： G09G3/3614 ,  G09G3/3607 ,  G09G2300/0426 ,  G09G2320/0209

摘要： A display device includes a display panel, a data driving part and a gate driving part. The display panel includes a first pixel row. The first pixel row includes a first pixel connected to an (n+1)-th gate line and an (m+1)-th data line (where ‘n’ and ‘m’ are natural numbers), and a second pixel connected to an n-th gate line and an (m+2)-th data line. The data driving part applies a data voltage having a first polarity with respect to a reference voltage to the (m+1)-th data line, and applies a data voltage having a second polarity with respect to the reference voltage to the (m+2)-th data line. The gate driving part sequentially applies a gate signal to the n-th gate line and the (n+1)-th gate line.

摘要翻译： 显示装置包括显示面板，数据驱动部和门驱动部。 显示面板包括第一像素行。 第一像素行包括连接到第（n + 1）栅极线和第（m + 1）数据线（其中'n'和'm'是自然数）的第一像素，并且第二像素连接 到第n个栅极线和第（m + 2）个数据线。 数据驱动部分对第（m + 1）数据线施加相对于参考电压具有第一极性的数据电压，并将相对于参考电压具有第二极性的数据电压施加到第（m + 2）数据线。 栅极驱动部分顺序地对第n条栅极线和第（n + 1）栅极线施加栅极信号。

公开(公告)号：US20100039364A1

公开(公告)日：2010-02-18

申请号：US12539032

申请日：2009-08-11

申请人： Yong-Soon Lee

发明人： Yong-Soon Lee

IPC分类号： G09G3/36 ,  H03K3/00

CPC分类号： G09G3/3696 ,  G09G2330/02

摘要： A drive voltage generating circuit which has a first shifter receiving an input voltage and outputting a first drive voltage obtained by first shifting a voltage level of the input voltage; a second shifter receiving outputting the second drive voltage obtained by second shifting a voltage level of the first drive voltage; and a drive voltage controller adjusting one of a shifting amount of the first shifter and a shifting amount of the second shifter in accordance with a surrounding temperature, wherein the second drive voltage is continuously varied in an analog manner, in accordance with the surrounding temperature.

摘要翻译： 驱动电压产生电路，其具有接收输入电压的第一移位器，并输出通过首先移位输入电压的电压电平而获得的第一驱动电压; 接收第二移位器，接收输出通过第二移位第一驱动电压的电压电平而获得的第二驱动电压; 以及驱动电压控制器，其根据周围温度调整第一移位器的移位量和移位量中的一个，其中第二驱动电压根据周围温度以模拟方式连续变化。

公开(公告)号：US20090021502A1

公开(公告)日：2009-01-22

申请号：US12147131

申请日：2008-06-26

申请人： Chang Soo LEE ,  Seung Hwan MOON ,  Yong Soon LEE

发明人： Chang Soo LEE ,  Seung Hwan MOON ,  Yong Soon LEE

IPC分类号： G09G5/00 ,  G09G3/20

CPC分类号： G09G3/3648 ,  G09G3/3677 ,  G09G2300/0417 ,  G09G2310/08 ,  G09G2320/041 ,  G11C19/184

摘要： A display device includes a display panel, a gate clock generator and a gate driver. The display panel includes a plurality of gate lines connected to a plurality of pixels. The gate clock generator generates a plurality of gate clock signals in which a width of a logic high period of a first gate clock signal is smaller than that of other gate clock signals during one frame period. The gate driver sequentially applies gate turn-on signals to the plurality of gate lines according to the gate clock signal and a gate clock bar signal having a phase opposite to the other gate clock signals.

摘要翻译： 显示装置包括显示面板，门时钟发生器和门驱动器。 显示面板包括连接到多个像素的多个栅极线。 栅极时钟发生器产生多个栅极时钟信号，其中在一个帧周期期间第一栅极时钟信号的逻辑高周期的宽度小于其它栅极时钟信号的宽度。 栅极驱动器根据栅极时钟信号和具有与其它栅极时钟信号相反的相位的栅极时钟条信号，顺序地将栅极导通信号施加到多个栅极线。