公开(公告)号：US20210003747A1

公开(公告)日：2021-01-07

申请号：US16919965

申请日：2020-07-02

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU ,  Hsin-Yu CHEN ,  Bing-Chia PENG

IPC: G02B3/08 ,  H04N5/232

Abstract: A polyhedron lens architecture is disposed in a virtual sphere. The virtual sphere has a horizontal plane, an upper hemisphere above the horizontal plane and a lower hemisphere below the horizontal plane. The polyhedron lens architecture has an upper half part above the horizontal plane, and a lower half part below the horizontal plane. The polyhedron lens architecture includes: multiple bases, which are respectively disposed on the upper half part and the lower half part; and multiple lenses respectively disposed on surfaces of the bases. Optical axes of the lenses intersect at a central point, which is located at the horizontal plane and is a structural center of the polyhedron lens architecture.

公开(公告)号：US20230056183A1

公开(公告)日：2023-02-23

申请号：US17400452

申请日：2021-08-12

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU

IPC: H04N5/232 ,  G06T1/20 ,  G06T3/00 ,  G06T5/40

Abstract: A multiple-processor system for a multiple-lens camera is disclosed. The system comprises multiple processor components (PCs) and multiple links. Each PC comprises multiple I/O ports and a processing unit. The multiple-lens camera captures a X-degree horizontal field of view and a Y-degree vertical field of view, where X

公开(公告)号：US20200286206A1

公开(公告)日：2020-09-10

申请号：US16292979

申请日：2019-03-05

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU

IPC: G06T3/20 ,  H04N5/232 ,  G06T3/00 ,  G06T3/40

Abstract: A method of adjusting texture coordinates based on control regions in a panoramic image is disclosed. The method comprises determining warping coefficients of a plurality of control regions in a panoramic image; retrieving two selected warping coefficients out of the warping coefficients for each of a plurality of camera images with respect to each vertex from a first vertex list according to two coefficient indices for each camera image in its data structure; calculating an interpolated warping coefficient for each camera image with respect to each vertex according to the two selected warping coefficients and a coefficient blending weight for each camera image in its data structure; and, calculating modified texture coordinates in each camera image for each vertex according to the interpolated warping coefficient and original texture coordinates for each camera image in its data structure to form a second vertex list.

公开(公告)号：US20150156517A1

公开(公告)日：2015-06-04

申请号：US14096488

申请日：2013-12-04

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU

IPC: H04N19/91 ,  H04N1/413 ,  H04N19/124 ,  H04N19/60 ,  H04N19/85

CPC classification number: H04N1/413 ,  H04N19/126 ,  H04N19/152 ,  H04N19/186 ,  H04N19/1883 ,  H04N19/423 ,  H04N19/60 ,  H04N19/63 ,  H04N19/635 ,  H04N19/64

Abstract: An image encoding system is disclosed. The image encoding system comprises a wavelet transform unit and a processing circuit. The wavelet transform unit performs a multiple-line-based wavelet transform on plural consecutive component lines to generate a wavelet transformed image comprising wavelet coefficients of plural sub-bands. The processing circuit coupled to the wavelet transform unit for quantizing, scanning and encoding the wavelet coefficients to generate a compressed image. Here, a number of the plural consecutive component lines is a multiple of 2 and less than 5. Since the wavelet transform unit performs the multiple-line-based wavelet transform to reduce the storage amount and maintain a good compression quality, an image encoding system of the invention can use SRAM buffers instead of a DRAM buffer.

Abstract translation: 公开了一种图像编码系统。 图像编码系统包括小波变换单元和处理电路。 小波变换单元在多个连续分量线上执行基于多行的小波变换，以生成包括多个子带的小波系数的小波变换图像。 耦合到小波变换单元的处理电路用于量化，扫描和编码小波系数以产生压缩图像。 这里，多个连续分量线中的多个是2并小于5的倍数。由于小波变换单元执行基于多行的小波变换以减小存储量并保持良好的压缩质量，所以图像编码系统 本发明可以使用SRAM缓冲器而不是DRAM缓冲器。

公开(公告)号：US20220182541A1

公开(公告)日：2022-06-09

申请号：US17115215

申请日：2020-12-08

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU

IPC: H04N5/232 ,  G06T3/40 ,  G03B37/04

Abstract: A method of compensating for color differences between adjacent lens images in a panoramic image is disclosed. The method comprises: calculating color differences of each pair of character regions between any two adjacent lens images out of multiple lens images from a multiple-lens camera according to average color values of the character regions, each character region having a character point; determining color adjustment amounts of character points in each lens image according to the color differences of each pair of character regions; calculating a color adjustment amount of an element according to positions of the element and its two adjacent character points and the color adjustment amounts of the two adjacent character points.

公开(公告)号：US20150234750A1

公开(公告)日：2015-08-20

申请号：US14182938

申请日：2014-02-18

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU ,  Hung-Ju HUANG

IPC: G06F12/14 ,  H04L9/30

CPC classification number: G06F12/1408 ,  G06F9/30007 ,  G06F2212/1052 ,  G09C1/00 ,  H04L9/3066 ,  H04L2209/122

Abstract: A method of accessing a desired memory location applied in a cipher processing apparatus is disclosed. The cipher processing apparatus comprises a plurality of registers and a register storage. The method comprises the steps of: reading a cipher instruction comprising an opcode field and an operand specifier field; reading a base address from one of the plurality of registers according to a register-id sub-field; respectively reading a bit length and an index value from the register storage and an index sub-field; determining the desired memory location according to the base address, the bit length and the index value; and, accessing the desired memory location to obtain a desired field variable. Here, the operand specifier field comprises the register-id sub-field and the index sub-field.

Abstract translation: 公开了一种访问在密码处理设备中应用的期望存储器位置的方法。 密码处理装置包括多个寄存器和寄存器存储器。 该方法包括以下步骤：读取包括操作码字段和操作数说明符字段的密码指令; 根据寄存器ID子字段从多个寄存器之一读取基地址; 分别从寄存器存储器和索引子字段读取位长度和索引值; 根据基地址，比特长度和索引值确定期望的存储器位置; 并且访问期望的存储器位置以获得期望的场变量。 这里，操作数说明符字段包括register-id子字段和索引子字段。

公开(公告)号：US20150189393A1

公开(公告)日：2015-07-02

申请号：US14146195

申请日：2014-01-02

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU

IPC: H04N21/6375 ,  H04N21/234 ,  H04N21/43 ,  H04N21/44 ,  H04N21/6583 ,  H04N21/2383 ,  H04N21/438

CPC classification number: H04N21/6375 ,  H04N21/23406 ,  H04N21/2383 ,  H04N21/4302 ,  H04N21/4382 ,  H04N21/44004 ,  H04N21/6583

Abstract: An image transmission system with finite re-transmission function is disclosed. The system of the invention comprises a communication channel, a transmitting device and a receiving device. The transmitting device comprises an encoder, a first coded buffer and a transmitter. The receiving device comprises a receiver, a second coded buffer, a decoder, a decoded buffer and a display control unit. The system of the invention uses line buffers due to its line-based encoding/decoding scheme, to thereby reduce hardware cost. In addition, the image transmission system of the invention conducts a skip-line-encoding mechanism, a stop-retransmitting mechanism and a line-ID-control mechanism, to thereby achieve a real-time transmission/display.

Abstract translation: 公开了一种具有有限重传功能的图像传输系统。 本发明的系统包括通信信道，发送装置和接收装置。 发送装置包括编码器，第一编码缓冲器和发送器。 接收装置包括接收机，第二编码缓冲器，解码器，解码缓冲器和显示控制单元。 本发明的系统由于其基于行的编码/解码方案而使用线路缓冲器，从而降低硬件成本。 此外，本发明的图像传输系统执行跳线编码机制，停止重传机制和线路ID控制机制，从而实现实时传输/显示。

公开(公告)号：US20140258699A1

公开(公告)日：2014-09-11

申请号：US13788926

申请日：2013-03-07

Applicant: ASPEED TECHNOLOGY INC.

Inventor： Fu-Chou HSU ,  Hung-Ju HUANG ,  Chung-Yen LU

IPC: G06F11/14

CPC classification number: G06F11/1417 ,  G06F11/0721 ,  G06F11/0757

Abstract: An auto firmware update device and method for fault-tolerance is provided. According to an embodiment of the invention, the auto firmware update device includes a serial port, a processor, a timer, a memory and a control unit. The serial port is used for coupling to an external device and updating firmware. The processor fetches instructions to boot. The timer is configured to start counting when the processor boots or restart each time, wherein the timer generates an alarm signal if the timer expires before the processor successfully boots. The memory stores a copy of firmware for booting. The control unit receives the alarm signal to stop the processor, downloads another copy of firmware for booting through the serial port to write to the memory, and restarts the processor.

Abstract translation: 提供了一种用于容错的自动固件更新装置和方法。 根据本发明的实施例，自动固件更新装置包括串行端口，处理器，定时器，存储器和控制单元。 串行端口用于耦合到外部设备并更新固件。 处理器获取引导的指令。 定时器被配置为在处理器启动或每次重新启动时开始计数，其中如果定时器在处理器成功启动之前到期，定时器产生报警信号。 存储器存储用于引导的固件的副本。 控制单元接收报警信号以停止处理器，下载另一个固件副本，以通过串行端口进行引导，以写入存储器，并重新启动处理器。

公开(公告)号：US20180114348A1

公开(公告)日：2018-04-26

申请号：US15333765

申请日：2016-10-25

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU ,  Pei-Hen HUNG ,  Jing-Chuan CHEN

IPC: G06T11/60 ,  G06T7/60 ,  G06T7/00 ,  G06T3/20

CPC classification number: G06T11/60 ,  G06T3/20 ,  G06T3/4038 ,  G06T7/60 ,  G06T7/70 ,  G06T2207/30242

Abstract: A transform apparatus applied in an image processing system with an image capture module is disclosed. The transform apparatus comprises a geometry information detector, a parameter setup unit, a primitive assembly unit and a geometry processing circuit. The geometry information detector measures geometry information of the image capture module. The parameter setup unit calculates geometry parameters and determines whether to assert an enable signal according to the geometry information. The primitive assembly unit receives an original vertex list and the enable signal to generate a vertex/ID flow. The geometry processing circuit receives the geometry parameters and performs geometry transform operations over the vertex/ID flow in response to whether the first enable signal is asserted to generate a modified vertex list. The geometry information comprises at least one of a displacement and rotation angles of the image capture module.

公开(公告)号：US20180018807A1

公开(公告)日：2018-01-18

申请号：US15211732

申请日：2016-07-15

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen LU ,  Pei-Hen HUNG ,  HUNG-JU HUANG ,  HUNG-MING LIN

IPC: G06T15/04 ,  H04N5/232

CPC classification number: G06T15/04 ,  G06T3/4038 ,  H04N5/23238

Abstract: An image processing apparatus is disclosed, which comprises a rasterization engine, a texture mapping module and a destination buffer. The rasterization engine receives a group of vertices from a vertex list and performs polygon rasterization operations for a point within the group of vertices forming a polygon to generate texture coordinates for each camera image. The vertex list comprises a plurality of vertices with their data structures. The texture mapping module texture maps texture data from each camera image according to its texture coordinates to generate a sample value for each camera image. The destination buffer is coupled to the texture mapping module and stores the panoramic image. Here, the data structures define a mapping between the panoramic image and the camera images.