公开(公告)号：US20220230946A1

公开(公告)日：2022-07-21

申请号：US17151062

申请日：2021-01-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Wei SHIH ,  Sheng-Wen YANG ,  Chung-Hung LAI ,  Chin-Li KAO

IPC: H01L23/498 ,  H01L23/538 ,  H01L23/31

Abstract: A substrate structure and a semiconductor package structure are provided. The substrate structure includes a first dielectric layer, a pad and a conductive structure. The first dielectric layer has a first surface and a second surface opposite to the first surface. The pad is adjacent to the first surface and at least partially embedded in the first dielectric layer. The first dielectric layer has an opening exposing the pad, and a width of the opening is less than a width of the pad. The conductive structure is disposed on the pad and composed of a first portion outside the opening of the first dielectric layer and a second portion embedded in the opening of the first dielectric layer. The first portion has an aspect ratio exceeding 1.375.

公开(公告)号：US20190040527A1

公开(公告)日：2019-02-07

申请号：US15668632

申请日：2017-08-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chuan-Yung SHIH ,  Tai-Yuan HUANG ,  Yu-Chi WANG ,  Chin-Feng WANG ,  Sing-Syuan SHIAU ,  Chun-Wei SHIH ,  Shao-Ci HUANG ,  Huang-Hsien CHANG ,  Yuan-Feng CHIANG

IPC: C23C16/458 ,  H01L21/687 ,  H01L21/677

CPC classification number: C23C16/458 ,  C23C16/4404 ,  H01L21/02271 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/67126 ,  H01L21/6719 ,  H01L21/67742 ,  H01L21/67748 ,  H01L21/68785

Abstract: In one or more embodiments, an apparatus for processing a wafer includes a ceramic wall, a metal wall and a frame. The ceramic wall defines a chamber for accommodating the wafer. The ceramic wall has a first surface defining a first opening. The metal wall surrounds the ceramic wall. The metal wall has a second surface defining a second opening adjacent to the first opening. The frame covers the second surface.