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公开(公告)号:US20240413115A1
公开(公告)日:2024-12-12
申请号:US18207090
申请日:2023-06-07
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Yu-Ling YEH , Yuan-Feng CHIANG , Chung-Hung LAI , Chin-Li KAO
Abstract: A package structure is provided. The package structure includes an electronic component, an encapsulant, a first conductive pillar, a first dielectric layer. The electronic component has an active surface. The encapsulant encapsulates the electronic component and exposes the active surface of the electronic component. The first conductive pillar is over the active surface of the electronic component, wherein an upper surface of the first conductive pillar includes a concave portion. The first dielectric layer is over the encapsulant and the active surface of the electronic component, wherein the first dielectric layer defines an opening exposing the concave portion of the first conductive pillar.
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公开(公告)号:US20220230946A1
公开(公告)日:2022-07-21
申请号:US17151062
申请日:2021-01-15
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chun-Wei SHIH , Sheng-Wen YANG , Chung-Hung LAI , Chin-Li KAO
IPC: H01L23/498 , H01L23/538 , H01L23/31
Abstract: A substrate structure and a semiconductor package structure are provided. The substrate structure includes a first dielectric layer, a pad and a conductive structure. The first dielectric layer has a first surface and a second surface opposite to the first surface. The pad is adjacent to the first surface and at least partially embedded in the first dielectric layer. The first dielectric layer has an opening exposing the pad, and a width of the opening is less than a width of the pad. The conductive structure is disposed on the pad and composed of a first portion outside the opening of the first dielectric layer and a second portion embedded in the opening of the first dielectric layer. The first portion has an aspect ratio exceeding 1.375.
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公开(公告)号:US20220384381A1
公开(公告)日:2022-12-01
申请号:US17334622
申请日:2021-05-28
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chung-Hung LAI , Chin-Li KAO , Chih-Yi HUANG , Teck-Chong LEE
IPC: H01L23/00 , H01L23/498 , H01L23/538 , H01L23/14 , H01L25/065
Abstract: An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.
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公开(公告)号:US20220148989A1
公开(公告)日:2022-05-12
申请号:US17092195
申请日:2020-11-06
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Yung-Sheng LIN , Yun-Ching HUNG , An-Hsuan HSU , Chung-Hung LAI
IPC: H01L23/00
Abstract: A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.
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