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公开(公告)号:US20220418115A1
公开(公告)日:2022-12-29
申请号:US17899553
申请日:2022-08-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Hsing Kuo TIEN , Chih-Cheng LEE , Min-Yao CHEN
IPC: H05K3/30 , H01L23/498 , H01L23/544 , H05K1/18 , H05K1/02 , H01L21/48
Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
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公开(公告)号:US20220095462A1
公开(公告)日:2022-03-24
申请号:US17025939
申请日:2020-09-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Hsing Kuo TIEN , Chih-Cheng LEE , Min-Yao CHEN
IPC: H05K3/30 , H01L23/498 , H01L23/544 , H01L21/48 , H05K1/18 , H05K1/02
Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
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公开(公告)号:US20210391284A1
公开(公告)日:2021-12-16
申请号:US16899515
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Chih-Cheng LEE , Min-Yao CHEN , Hsing Kuo TIEN
Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
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公开(公告)号:US20220157745A1
公开(公告)日:2022-05-19
申请号:US17589720
申请日:2022-01-31
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Chih-Cheng LEE , Min-Yao CHEN , Hsing Kuo TIEN
Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
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公开(公告)号:US20210391283A1
公开(公告)日:2021-12-16
申请号:US16899507
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Chih-Cheng LEE , Min-Yao CHEN , Hsing Kuo TIEN
Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
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公开(公告)号:US20240290515A1
公开(公告)日:2024-08-29
申请号:US18114181
申请日:2023-02-24
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Hung Yi CHUANG , Shin-Luh TARNG
CPC classification number: H01B1/20 , H05K1/0233 , H05K1/115 , H05K5/0026
Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes an electronic component and a first connection element. The electronic component includes a conductive wire and a magnetic layer encapsulating the conductive wire. The first connection element is electrically connected to the conductive wire. The first connection element is disposed outside the magnetic layer.
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公开(公告)号:US20240112848A1
公开(公告)日:2024-04-04
申请号:US17956681
申请日:2022-09-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Hung Yi CHUANG
CPC classification number: H01F27/2823 , H01F27/24
Abstract: A package structure is provided. The package structure includes an electronic component and a connection element. The electronic component includes a conductive wire and a magnetic layer encapsulating the conductive wire. The connection element penetrates and contacts the magnetic layer and the conductive wire.
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公开(公告)号:US20220384309A1
公开(公告)日:2022-12-01
申请号:US17334569
申请日:2021-05-28
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan KUNG , Hung-Yi LIN , Chin-Cheng KUO , Wu Chou HSU
IPC: H01L23/48 , H01L21/768
Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
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公开(公告)号:US20220285282A1
公开(公告)日:2022-09-08
申请号:US17752793
申请日:2022-05-24
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Min-Yao CHEN
IPC: H01L23/538 , H01L23/31 , H01L23/00 , H01L21/48
Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
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10.
公开(公告)号:US20210391271A1
公开(公告)日:2021-12-16
申请号:US16899517
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou HSU , Min-Yao CHEN
IPC: H01L23/538 , H01L23/31 , H01L23/00 , H01L21/48
Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
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