公开(公告)号：US20190244909A1

公开(公告)日：2019-08-08

申请号：US15891305

申请日：2018-02-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yong-Da CHIU ,  Shiu-Chih WANG ,  Shang-Kun HUANG ,  Ying-Ta CHIU ,  Shin-Luh TARNG ,  Chih-Pin HUNG

IPC: H01L23/532 ,  H01L23/00

CPC classification number: H01L23/53233 ,  H01L23/53238 ,  H01L24/06 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/161 ,  H05K2201/03 ,  H05K2201/09481

Abstract: A semiconductor package includes an electrical connection structure. The electrical connection structure includes: a first conductive layer; a second conductive layer on the first conductive layer; and a conductive cap between the first conductive layer and the second conductive layer, the conductive cap having a hardness greater than a hardness of the first conductive layer.

公开(公告)号：US20220056589A1

公开(公告)日：2022-02-24

申请号：US17000239

申请日：2020-08-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Wei CHIANG ,  Shin-Luh TARNG ,  Chih-Pin HUNG ,  Shiu-Chih WANG ,  Yong-Da CHIU

IPC: C23C18/16 ,  H01L21/67 ,  H01L21/768

Abstract: An electroless semiconductor bonding structure, an electroless plating system and an electroless plating method of the same are provided. The electroless semiconductor bonding structure includes a first substrate and a second substrate. The first substrate includes a first metal bonding structure disposed adjacent to a first surface of the first substrate. The second substrate includes a second metal bonding structure disposed adjacent to a second surface of the second substrate. The first metal bonding structure connects to the second metal bonding structure at an interface by electroless bonding and the interface is substantially void free.

公开(公告)号：US20180247913A1

公开(公告)日：2018-08-30

申请号：US15444130

申请日：2017-02-27

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC. ,  NATIONAL CHUNG HSING UNIVERSITY

Inventor： Ying-Ta CHIU ,  Shang-Kun HUANG ,  Yong-Da CHIU ,  Jenn-Ming SONG

IPC: H01L23/00

CPC classification number: H01L24/80 ,  H01L24/05 ,  H01L2224/80009 ,  H01L2224/80092 ,  H01L2224/8012 ,  H01L2224/80203

Abstract: The present disclosure relates to a method for manufacturing a semiconductor device. The method includes providing a first electronic component including a first metal contact and a second electronic component including a second metal contact, changing a lattice of the first metal contact, and bonding the first metal contact to the second metal contact under a predetermined pressure and a predetermined temperature.