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公开(公告)号:US20220056589A1
公开(公告)日:2022-02-24
申请号:US17000239
申请日:2020-08-21
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chun-Wei CHIANG , Shin-Luh TARNG , Chih-Pin HUNG , Shiu-Chih WANG , Yong-Da CHIU
IPC: C23C18/16 , H01L21/67 , H01L21/768
Abstract: An electroless semiconductor bonding structure, an electroless plating system and an electroless plating method of the same are provided. The electroless semiconductor bonding structure includes a first substrate and a second substrate. The first substrate includes a first metal bonding structure disposed adjacent to a first surface of the first substrate. The second substrate includes a second metal bonding structure disposed adjacent to a second surface of the second substrate. The first metal bonding structure connects to the second metal bonding structure at an interface by electroless bonding and the interface is substantially void free.
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公开(公告)号:US20250038106A1
公开(公告)日:2025-01-30
申请号:US18227896
申请日:2023-07-28
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chun-Wei CHIANG , Yung-Sheng LIN , I-Ting LIN , Ping-Hung HSIEH , Chih-Yuan HSU
IPC: H01L23/528 , H01L21/768 , H01L23/498 , H01L23/522
Abstract: A bond structure is provided. The bond structure includes a seed layer and a conductive structure. The conductive structure includes a via portion over the seed layer and a plurality of wires protruding from the via portion.
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公开(公告)号:US20240297086A1
公开(公告)日:2024-09-05
申请号:US18116268
申请日:2023-03-01
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chun-Wei CHIANG , Yun-Ching HUNG , Yung-Sheng LIN
CPC classification number: H01L23/10 , H01L21/50 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/05573 , H01L2224/05611 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05666 , H01L2224/05671 , H01L2224/13083 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1316 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/13171 , H01L2224/16227 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204
Abstract: An interconnection structure and a package structure are provided. The interconnection structure includes a substrate, a conductive layer, a bonding layer, and a moderating layer. The conductive layer is over the substrate and has a top surface. The bonding layer is over the top surface of the conductive layer. The moderating layer is between the conductive layer and the bonding layer and configured to mitigate an increase in a surface roughness of the top surface of the conductive layer during an electroless plating process for forming the bonding layer.
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