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    CURRENT CONTROLLED BIASING FOR CURRENT-STEERING BASED RF VARIABLE GAIN AMPLIFIERS
    2.
    发明申请
    CURRENT CONTROLLED BIASING FOR CURRENT-STEERING BASED RF VARIABLE GAIN AMPLIFIERS 有权
    基于电流转换的RF可变增益放大器的电流控制偏置

    公开(公告)号：US20100093291A1

    公开(公告)日：2010-04-15

    申请号：US12520513

    申请日：2007-12-20

    申请人： Sherif H.K. Embabi ,  Abdellatif Bellaouar ,  Michel J.G.J.P. Frechette

    发明人： Sherif H.K. Embabi ,  Abdellatif Bellaouar ,  Michel J.G.J.P. Frechette

    IPC分类号： H04B1/04

    CPC分类号： H03G3/3042 ,  H03G1/04

    摘要： An adaptive current control circuit for reduced power consumption and minimized gain shift in a variable gain amplifier. An automatic gain control circuit provides gain control voltages in response to a gain control signal. The gain control voltages are used by the variable gain amplifier to set the gain of the output signal for wireless transmit operations. The adaptive current control circuit receives the same gain control voltages for reducing current to the variable gain amplifier during low gain operation, while providing higher currents during high gain operation. The current that is provided is a hybrid mix of proportional to absolute temperature (PTAT) current and complementary to absolute temperature (CTAT) current for minimizing temperature effects on the gain. The ratio of PTAT current and CTAT current is adjustable for specific temperature ranges to further minimize temperature effects on the gain.

    摘要翻译： 一种自适应电流控制电路，用于降低可变增益放大器的功耗和最小化增益偏移。 自动增益控制电路响应增益控制信号提供增益控制电压。 可变增益放大器使用增益控制电压来设置无线发射操作的输出信号的增益。 自适应电流控制电路在低增益操作期间接收相同的增益控制电压，以减小电流到可变增益放大器，同时在高增益操作期间提供更高的电流。 提供的电流是与绝对温度（PTAT）电流成比例和与绝对温度（CTAT）电流互补的混合混合，以最小化对增益的温度影响。 PTAT电流和CTAT电流的比例可针对特定温度范围进行调节，以进一步降低温度对增益的影响。

    AUTOMATIC IIP2 CALIBRATION ARCHITECTURE
    4.
    发明申请
    AUTOMATIC IIP2 CALIBRATION ARCHITECTURE 有权
    自动IIP2校准架构

    公开(公告)号：US20080182537A1

    公开(公告)日：2008-07-31

    申请号：US11626964

    申请日：2007-01-25

    申请人： Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safari

    发明人： Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safari

    IPC分类号： H04B17/00

    CPC分类号： H04B1/12 ,  H03D2200/0045 ,  H04B17/21

    摘要： An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.

    摘要翻译： 公开了一种用于无线收发器的综合自动IIP2校准架构。 该架构使得无线收发器能够生成具有最小附加电路的具有二阶音调的测试射频（RF）信号。 特别地，使用本机收发器电路和测试适配器电路的组合产生测试RF信号。 本地收发器电路是在收发器芯片上实现的用于在正常操作期间执行本机收发器功能的那些电路，其可用于产生测试（RF）信号。 测试适配器电路被添加到收发器芯片中，更具体地被添加到本地电路，用于使得本机电路能够以自测试操作模式生成测试RF信号。 用于实现特定的IIP2最小化方案的电路可以在自检操作模式下在收发器芯片中包括在自动IIP2校准中。

    Automatic IIP2 calibration architecture
    5.
    发明授权
    Automatic IIP2 calibration architecture 有权
    自动IIP2校准架构

    公开(公告)号：US07742747B2

    公开(公告)日：2010-06-22

    申请号：US11626964

    申请日：2007-01-25

    申请人： Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safiri

    发明人： Tajinder Manku ,  Abdellatif Bellaouar ,  Alan Holden ,  Hamid R. Safiri

    IPC分类号： H04B1/04 ,  H04K3/00

    CPC分类号： H04B1/12 ,  H03D2200/0045 ,  H04B17/21

    摘要： An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.

    摘要翻译： 公开了一种用于无线收发器的综合自动IIP2校准架构。 该架构使得无线收发器能够生成具有最小附加电路的具有二阶音调的测试射频（RF）信号。 特别地，使用本机收发器电路和测试适配器电路的组合产生测试RF信号。 本地收发器电路是在收发器芯片上实现的用于在正常操作期间执行本机收发器功能的那些电路，其可用于产生测试（RF）信号。 测试适配器电路被添加到收发器芯片中，更具体地被添加到本地电路，用于使得本机电路能够以自测试操作模式生成测试RF信号。 用于实现特定的IIP2最小化方案的电路可以在自检操作模式下在收发器芯片中包括在自动IIP2校准中。

    Digital linear transmitter architecture
    6.
    发明授权
    Digital linear transmitter architecture 有权
    数字线性发射机架构

    公开(公告)号：US08472552B2

    公开(公告)日：2013-06-25

    申请号：US12520486

    申请日：2007-12-14

    申请人： Tajinder Manku ,  Abdellatif Bellaouar

    发明人： Tajinder Manku ,  Abdellatif Bellaouar

    IPC分类号： H04L27/00

    CPC分类号： H03M1/68 ,  H03M1/745 ,  H03M3/50 ,  H03M7/3004

    摘要： A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (ΔΣ) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ΔΣ DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.

    摘要翻译： 一种用于数字到模拟转换射频信号的数字线性发射机。 发射机在无线设备的发射路径中包括Δ西格玛（DeltaSigma）数模转换器（DAC）和加权信号数模转换器，以减少对相对大的模拟组件的依赖。 DeltaSigma DAC转换过采样信号的最低有效位，而加权信号数模转换器转换过采样信号的最高有效位。 发射机核心包括用于提供过采样的调制数字信号的组件，然后在产生相应的模拟信号之前对过采样信号进行一阶滤波。 该装置和方法减少了模拟组件并增加了无线RF设备的发射机核心架构中的数字组件。

    Hybrid linear and polar modulation apparatus
    7.
    发明授权
    Hybrid linear and polar modulation apparatus 有权
    混合线性和极化调制装置

    公开(公告)号：US07623000B2

    公开(公告)日：2009-11-24

    申请号：US11778849

    申请日：2007-07-17

    申请人： Tajinder Manku ,  Abdellatif Bellaouar

    发明人： Tajinder Manku ,  Abdellatif Bellaouar

    IPC分类号： H04L27/20 ,  H04L27/36

    CPC分类号： H03C5/00

    摘要： The invention is directed at a hybrid modulation apparatus which combines a polar modulation circuit and a linear modulation circuit. The hybrid apparatus allows a communications device to function as a polar or a linear modulation circuit with less components as the output of the linear modulation circuit is an input of the polar modulation circuit.

    摘要翻译： 本发明涉及组合极性调制电路和线性调制电路的混合调制装置。 混合设备允许通信设备用作具有较少组件的极性或线性调制电路，因为线性调制电路的输出是极坐标调制电路的输入。

    Method and device for sending signals between a radio frequency circuit and a baseband circuit
    8.
    发明授权
    Method and device for sending signals between a radio frequency circuit and a baseband circuit 有权
    用于在射频电路和基带电路之间发送信号的方法和装置

    公开(公告)号：US09026069B2

    公开(公告)日：2015-05-05

    申请号：US13640079

    申请日：2011-04-08

    申请人： Abdellatif Bellaouar ,  Steve Felix ,  Hamid Safiri

    发明人： Abdellatif Bellaouar ,  Steve Felix ,  Hamid Safiri

    IPC分类号： H01Q11/12 ,  H04B1/04 ,  H04B1/40

    CPC分类号： H04B1/40 ,  H04B1/406

    摘要： A method, device and computer program product is provided for sending a data signal and a clock signal between a radio frequency circuit of a device and a baseband circuit of the device, the radio frequency circuit being configured for at least one of transmission and reception of radio signals in a radio frequency band, where the clock signal has a clock frequency Fc. The method comprises selecting the clock frequency Fc to be a rational multiple of the 0.270833 MHz symbol rate of the Global System for Mobile Communications (GSM) standard and a rational multiple of the 3.84 MHz chipping rate of the Wideband Code Division Multiple Access (WCDMA) interface. The clock frequency Fc is selected such that the clock signal can be generated using a 38.4 MHz or 19.2 MHz reference clock signal, a non-fractional Phase Locked Loop clock multiplier and an output divider, without first having to divide down the reference clock signal. The data signal and the clock signal can then be sent between the radio frequency circuit and the baseband circuit using the selected clock frequency Fc.

    摘要翻译： 提供一种方法，装置和计算机程序产品，用于在设备的射频电路和设备的基带电路之间发送数据信号和时钟信号，该射频电路被配置用于发送和接收 射频信号，其中时钟信号具有时钟频率Fc。 该方法包括选择时钟频率Fc为全球移动通信系统（GSM）标准的0.270833MHz符号率的合理倍数，以及宽带码分多址（WCDMA）的3.84MHz码片速率的有理倍数， 接口。 选择时钟频率Fc，使得可以使用38.4MHz或19.2MHz参考时钟信号，非分数锁相环时钟乘法器和输出分频器来产生时钟信号，而不必先分频参考时钟信号。 然后可以使用所选择的时钟频率Fc在数字信号和时钟信号之间在射频电路和基带电路之间发送。

    METHOD AND DEVICE FOR SENDING SIGNALS BETWEEN A RADIO FREQUENCY CIRCUIT AND A BASEBAND CIRCUIT
    9.
    发明申请
    METHOD AND DEVICE FOR SENDING SIGNALS BETWEEN A RADIO FREQUENCY CIRCUIT AND A BASEBAND CIRCUIT 有权
    用于在无线电频率电路和基带电路之间发送信号的方法和装置

    公开(公告)号：US20140051365A1

    公开(公告)日：2014-02-20

    申请号：US13640079

    申请日：2011-04-08

    申请人： Abdellatif Bellaouar ,  Steve Felix ,  Hamid Safiri

    发明人： Abdellatif Bellaouar ,  Steve Felix ,  Hamid Safiri

    IPC分类号： H04B1/40

    CPC分类号： H04B1/40 ,  H04B1/406

    摘要： A method, device and computer program product is provided for sending a data signal and a clock signal between a radio frequency circuit of a device and a baseband circuit of the device, the radio frequency circuit being configured for at least one of transmission and reception of radio signals in a radio frequency band, where the clock signal has a clock frequency Fc. The method comprises selecting the clock frequency Fc to be a rational multiple of the 0.270833 MHz symbol rate of the Global System for Mobile Communications (GSM) standard and a rational multiple of the 3.84 MHz chipping rate of the Wideband Code Division Multiple Access (WCDMA) interface. The clock frequency Fc is selected such that the clock signal can be generated using a 38.4 MHz or 19.2 MHz reference clock signal, a non-fractional Phase Locked Loop clock multiplier and an output divider, without first having to divide down the reference clock signal. The data signal and the clock signal can then be sent between the radio frequency circuit and the baseband circuit using the selected clock frequency Fc.

    摘要翻译： 提供一种方法，装置和计算机程序产品，用于在设备的射频电路和设备的基带电路之间发送数据信号和时钟信号，该射频电路被配置用于发送和接收 射频信号，其中时钟信号具有时钟频率Fc。 该方法包括选择时钟频率Fc为全球移动通信系统（GSM）标准的0.270833MHz符号率的合理倍数，以及宽带码分多址（WCDMA）的3.84MHz码片速率的有理倍数， 接口。 选择时钟频率Fc，使得可以使用38.4MHz或19.2MHz参考时钟信号，非分数锁相环时钟乘法器和输出分频器来产生时钟信号，而不必先分频参考时钟信号。 然后可以使用所选择的时钟频率Fc在数字信号和时钟信号之间在射频电路和基带电路之间发送。