公开(公告)号：US20190079884A1

公开(公告)日：2019-03-14

申请号：US15700838

申请日：2017-09-11

Applicant: Apple Inc.

Inventor： James D. Ramsay ,  Inder Sodhi

IPC: G06F13/24 ,  G06F13/16 ,  G06F13/42 ,  G06F13/22

CPC classification number: G06F13/24 ,  G06F13/1642 ,  G06F13/22 ,  G06F13/4282

Abstract: An interrupt mechanism is disclosed. In one embodiment an integrated circuit (IC) is coupled to a number of peripheral devices, via a bus, and includes an interface controller. The interface controller includes a bus engine circuit coupled to receive data from the various ones of the peripheral devices, wherein the data may include various requests. The bus engine circuit also includes decoding circuitry configured to decode the data to determine the nature of the requests. Responsive to determining that interrupt information is stored in one or more of the requests, the interrupt information may be written to one of a number of interrupt registers. An interrupt controller may read the interrupt registers to determine the presence of interrupts, and thus initiate the process to see that they are serviced.

公开(公告)号：US10346328B2

公开(公告)日：2019-07-09

申请号：US15700838

申请日：2017-09-11

Applicant: Apple Inc.

Inventor： James D. Ramsay ,  Inder Sodhi

IPC: G06F13/24 ,  G06F13/22 ,  G06F13/42 ,  G06F13/16

Abstract: An interrupt mechanism is disclosed. In one embodiment an integrated circuit (IC) is coupled to a number of peripheral devices, via a bus, and includes an interface controller. The interface controller includes a bus engine circuit coupled to receive data from the various ones of the peripheral devices, wherein the data may include various requests. The bus engine circuit also includes decoding circuitry configured to decode the data to determine the nature of the requests. Responsive to determining that interrupt information is stored in one or more of the requests, the interrupt information may be written to one of a number of interrupt registers. An interrupt controller may read the interrupt registers to determine the presence of interrupts, and thus initiate the process to see that they are serviced.

公开(公告)号：US09632137B2

公开(公告)日：2017-04-25

申请号：US14693116

申请日：2015-04-22

Applicant: Apple Inc.

Inventor： James D. Ramsay ,  Manu Gulati ,  Mitchell Palmer Lichtenberg, Jr.

IPC: G06F11/00 ,  G01R31/317 ,  G06F11/22

CPC classification number: G01R31/31705 ,  G06F11/2221

Abstract: An integrated circuit (IC) having a bridge for interfacing a debugger and method of operating the same is provided. In one embodiment, an IC includes a debug control circuit and a debug interface block (DIB) implemented thereon. The DIB is coupled to the debug control circuit. The IC also includes an interface for a debugger and a number of interfaces for external circuits, each of the interfaces being coupled to the debug control circuit. The debug control circuit may function as a bridge for coupling an external debugger to the DIB and to external circuits coupled to the IC through corresponding ones of the interfaces. The debug control circuit may establish a connection between the debugger and one of the external circuits. Communications between the debugger and the external circuit may be conducted while bypassing the DIB.

公开(公告)号：US20160313396A1

公开(公告)日：2016-10-27

申请号：US14693116

申请日：2015-04-22

Applicant: Apple Inc.

Inventor： James D. Ramsay ,  Manu Gulati ,  Mitchell Palmer Lichtenberg, JR.

IPC: G01R31/3177

CPC classification number: G01R31/31705 ,  G06F11/2221

Abstract: An integrated circuit (IC) having a bridge for interfacing a debugger and method of operating the same is provided. In one embodiment, an IC includes a debug control circuit and a debug interface block (DIB) implemented thereon. The DIB is coupled to the debug control circuit. The IC also includes an interface for a debugger and a number of interfaces for external circuits, each of the interfaces being coupled to the debug control circuit. The debug control circuit may function as a bridge for coupling an external debugger to the DIB and to external circuits coupled to the IC through corresponding ones of the interfaces. The debug control circuit may establish a connection between the debugger and one of the external circuits. Communications between the debugger and the external circuit may be conducted while bypassing the DIB.

Abstract translation: 提供一种具有用于与调试器进行接口的桥接器及其操作方法的集成电路（IC）。 在一个实施例中，IC包括在其上实现的调试控制电路和调试接口块（DIB）。 DIB耦合到调试控制电路。 IC还包括用于调试器的接口和用于外部电路的多个接口，每个接口耦合到调试控制电路。 调试控制电路可以用作用于将外部调试器耦合到DIB的桥，以及通过相应的接口耦合到IC的外部电路。 调试控制电路可以建立调试器和其中一个外部电路之间的连接。 调试器和外部电路之间的通信可以绕过DIB进行。