公开(公告)号：US20240144932A1

公开(公告)日：2024-05-02

申请号：US18501786

申请日：2023-11-03

Applicant: Apple Inc.

Inventor： Timothy J. Millet ,  Manu Gulati ,  Michael F. Culbert

IPC: G10L15/28 ,  G06F1/32 ,  G06F1/3228 ,  G06F1/3287 ,  G06F3/16 ,  G10L15/22

CPC classification number: G10L15/28 ,  G06F1/32 ,  G06F1/3228 ,  G06F1/3287 ,  G06F3/165 ,  G10L15/22 ,  G10L2015/088

Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.

公开(公告)号：US20210333132A1

公开(公告)日：2021-10-28

申请号：US17366459

申请日：2021-07-02

Applicant: Apple Inc.

Inventor： Brijesh Tripathi ,  Shane J. Keil ,  Manu Gulati ,  Jung Wook Cho ,  Erik P. Machnicki ,  Gilbert H. Herbeck ,  Timothy J. Millet ,  Joshua P. de Cesare ,  Anand Dalal ,  Michael F. Culbert

IPC: G01D9/00 ,  G06F13/16 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3293

Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

公开(公告)号：US11138346B2

公开(公告)日：2021-10-05

申请号：US16859634

申请日：2020-04-27

Applicant: Apple Inc.

Inventor： Manu Gulati ,  Joseph Sokol, Jr. ,  Jeffrey R. Wilcox ,  Bernard J. Semeria ,  Michael J. Smith

IPC: G06F21/72 ,  G06F12/02 ,  G06F12/1027 ,  G06F12/14 ,  G06F21/78 ,  H04L9/08

Abstract: In one embodiment, a system includes a non-volatile memory that may serve as both the main memory system and the backing store (or persistent storage). In some embodiments, the non-volatile memory is divided into a main memory portion and a persistent portion. Data in the main memory operation may be encrypted using one or more first keys, and data in the persistent portion may be encrypted using one or more second keys, in an embodiment. The volatile behavior of main memory may be implemented by discarding the one or more first keys in a power down event or other event that indicates a loss of main memory data, while the one or more second keys may be retained. In one embodiment, the physical address space of the non-volatile memory may be a mapping from a second physical address space that is used within the system.

公开(公告)号：US20210287677A1

公开(公告)日：2021-09-16

申请号：US17332725

申请日：2021-05-27

Applicant: Apple Inc.

Inventor： Timothy J. Millet ,  Manu Gulati ,  Michael F. Culbert

IPC: G10L15/28 ,  G06F3/16 ,  G06F1/3228 ,  G06F1/3287 ,  G06F1/32 ,  G10L15/22

Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.

公开(公告)号：US11079261B2

公开(公告)日：2021-08-03

申请号：US16689555

申请日：2019-11-20

Applicant: Apple Inc.

Inventor： Brijesh Tripathi ,  Shane J. Keil ,  Manu Gulati ,  Jung Wook Cho ,  Erik P. Machnicki ,  Gilbert H. Herbeck ,  Timothy J. Millet ,  Joshua P. de Cesare ,  Anand Dalal

IPC: G01D9/00 ,  G06F13/16 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3293

Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

公开(公告)号：US20200184976A1

公开(公告)日：2020-06-11

申请号：US16786127

申请日：2020-02-10

Applicant: Apple Inc.

Inventor： Timothy J. Millet ,  Manu Gulati ,  Michael F. Culbert

IPC: G10L15/28 ,  G10L15/22 ,  G06F1/32 ,  G06F1/3287 ,  G06F1/3228 ,  G06F3/16

Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.

公开(公告)号：US10671762B2

公开(公告)日：2020-06-02

申请号：US15748893

申请日：2016-08-25

Applicant: Apple Inc.

Inventor： Manu Gulati ,  Joseph Sokol, Jr. ,  Jeffrey R. Wilcox ,  Bernard J. Semeria ,  Michael J. Smith

IPC: G06F21/72 ,  G06F12/02 ,  G06F12/1027 ,  G06F12/14 ,  G06F21/78 ,  H04L9/08

Abstract: In one embodiment, a system includes a non-volatile memory that may serve as both the main memory system and the backing store (or persistent storage). In some embodiments, the non-volatile memory is divided into a main memory portion and a persistent portion. Data in the main memory operation may be encrypted using one or more first keys, and data in the persistent portion may be encrypted using one or more second keys, in an embodiment. The volatile behavior of main memory may be implemented by discarding the one or more first keys in a power down event or other event that indicates a loss of main memory data, while the one or more second keys may be retained. In one embodiment, the physical address space of the non-volatile memory may be a mapping from a second physical address space that is used within the system.

公开(公告)号：US20200149932A1

公开(公告)日：2020-05-14

申请号：US16689555

申请日：2019-11-20

Applicant: Apple Inc.

Inventor： Brijesh Tripathi ,  Shane J. Keil ,  Manu Gulati ,  Jung Wook Cho ,  Erik P. Machnicki ,  Gilbert H. Herbeck ,  Timothy J. Millet ,  Joshua P. de Cesare ,  Anand Dalal

IPC: G01D9/00 ,  G06F1/3293 ,  G06F1/3287 ,  G06F1/3206 ,  G06F13/16

Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

公开(公告)号：US10276165B2

公开(公告)日：2019-04-30

申请号：US16101603

申请日：2018-08-13

Applicant: Apple Inc. ,  Diane Culbert

Inventor： Timothy J. Millet ,  Manu Gulati ,  Michael F. Culbert

IPC: G10L15/28 ,  G06F3/16 ,  G06F1/3228 ,  G06F1/3287 ,  G06F1/32 ,  G10L15/22 ,  G10L15/08 ,  G10L25/48

Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.

公开(公告)号：US20180314592A1

公开(公告)日：2018-11-01

申请号：US16029829

申请日：2018-07-09

Applicant: Apple Inc.

Inventor： Manu Gulati ,  Sukalpa Biswas ,  Jeffrey R. Wilcox ,  Farid Nemati

IPC: G06F11/10 ,  G11C29/52

CPC classification number: G06F11/1068 ,  G06F12/0669 ,  G06F12/1072 ,  G06F12/12 ,  G06F12/121 ,  G06F12/126 ,  G06F2212/1032 ,  G06F2212/7204 ,  G06F2212/7207 ,  G11C29/52 ,  G11C29/70 ,  G11C29/72 ,  G11C2029/0409 ,  G11C2029/0411 ,  G11C2029/4402

Abstract: In one embodiment, a system includes a memory that includes a live section and a spares section. The live section may be mapped to the address space of the system, and may be accessed in response to memory operations. Once an entry in the live section has been detected as failed, an entry is in the spares section may be allocated to replace the failed entry. During subsequent accesses to the failed entry, the allocated entry may be used instead. In an embodiment, the failed entry may be coded with an indication of the allocated entry, to redirect to the allocated entry. In one implementation, for example, the failed entry may be coded with N copies of a pointer to the allocated entry, each copy protected by corresponding ECC.