-
公开(公告)号:US06686237B1
公开(公告)日:2004-02-03
申请号:US10286936
申请日:2002-10-31
申请人: Bill Alan Wofford , Robert Nguyen
发明人: Bill Alan Wofford , Robert Nguyen
IPC分类号: H01L218242
CPC分类号: H01L28/60 , H01L21/31116 , H01L21/32134 , H01L21/32136
摘要: A polysilicon layer (30) is formed on a dielectric region (20). An optional metal silicide layer (50) can be formed on the polysilicon layer. A dielectric layer (60) is formed over the metal silicide layer and a conductive layer (70) formed over the dielectric layer. The formed layers are etched by a combination of multi-step dry and wet process to form high precision integrated circuit capacitors.
摘要翻译: 在电介质区域(20)上形成多晶硅层(30)。 可以在多晶硅层上形成任选的金属硅化物层(50)。 在金属硅化物层上形成介电层(60),在介电层上形成导电层(70)。 通过多级干式和湿式工艺的组合蚀刻形成的层以形成高精度集成电路电容器。
-
公开(公告)号:US06806196B2
公开(公告)日:2004-10-19
申请号:US10735568
申请日:2003-12-12
申请人: Bill Alan Wofford , Robert Nguyen
发明人: Bill Alan Wofford , Robert Nguyen
IPC分类号: H01L21302
CPC分类号: H01L28/60 , H01L21/31116 , H01L21/32134 , H01L21/32136
摘要: A polysilicon layer (30) is formed on a dielectric region (20). An optional metal silicide layer (50) can be formed on the polysilicon layer. A dielectric layer (60) is formed over the metal silicide layer and a conductive layer (70) formed over the dielectric layer. The formed layers are etched by a combination of multi-step dry and wet process to form high precision integrated circuit capacitors.
-
公开(公告)号:US07118959B2
公开(公告)日:2006-10-10
申请号:US11077074
申请日:2005-03-10
申请人: Bill Alan Wofford , Blake Ryan Pasker , Xinfen Chen , Binghua Hu
发明人: Bill Alan Wofford , Blake Ryan Pasker , Xinfen Chen , Binghua Hu
IPC分类号: H01L21/8242
CPC分类号: H01L28/40 , Y10S438/952
摘要: A capacitor (100) is disclosed that is formed as part of an integrated circuit (IC) fabrication process. The capacitor (100) has conductive top and bottom electrodes (140, 144) and a nonconductive capacitor dielectric (142). In one example, the dielectric (142) includes first and second thin dielectric layers (112, 114) that sandwich a layer of antireflective material (118). The thin layers (112, 114) provide the dielectric behavior necessary for the capacitor while the antireflective layer (118) promotes reduced feature sizes by mitigating reflected standing waves, among other things.
摘要翻译: 公开了作为集成电路(IC)制造工艺的一部分形成的电容器(100)。 电容器(100)具有导电的顶部和底部电极(140,144)和非导电电容器电介质(142)。 在一个示例中,电介质(142)包括夹着抗反射材料层(118)的第一和第二薄介电层(112,114)。 薄层(112,114)提供电容器所需的电介质行为,而抗反射层(118)除其他之外通过减轻反射的驻波来促进减小的特征尺寸。
-
公开(公告)号:US07595525B2
公开(公告)日:2009-09-29
申请号:US11470023
申请日:2006-09-05
申请人: Bill Alan Wofford , Blake Ryan Pasker , Xinfen Chen , Binghua Hu
发明人: Bill Alan Wofford , Blake Ryan Pasker , Xinfen Chen , Binghua Hu
IPC分类号: H01L27/108
CPC分类号: H01L28/40 , Y10S438/952
摘要: A capacitor (100) is disclosed that is formed as part of an integrated circuit (IC) fabrication process. The capacitor (100) has conductive top and bottom electrodes (140, 144) and a nonconductive capacitor dielectric (142). In one example, the dielectric (142) includes first and second thin dielectric layers (112, 114) that sandwich a layer of antireflective material (118). The thin layers (112, 114) provide the dielectric behavior necessary for the capacitor while the antireflective layer (118) promotes reduced feature sizes by mitigating reflected standing waves, among other things.
摘要翻译: 公开了作为集成电路(IC)制造工艺的一部分形成的电容器(100)。 电容器(100)具有导电的顶部和底部电极(140,144)和非导电电容器电介质(142)。 在一个示例中,电介质(142)包括夹着抗反射材料层(118)的第一和第二薄介电层(112,114)。 薄层(112,114)提供电容器所需的电介质行为,而抗反射层(118)除其他之外通过减轻反射的驻波来促进减小的特征尺寸。
-
-
-