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公开(公告)号：US07741721B2
公开(公告)日：2010-06-22
申请号：US11831236
申请日：2007-07-31
申请人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
发明人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
IPC分类号： H01L23/52
CPC分类号： H01L23/5256 , H01L21/0337 , H01L21/31144 , H01L21/32139 , H01L21/76816 , H01L23/5226 , H01L23/5228 , H01L27/101 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a first set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
摘要翻译： 提供具有亚光刻横向或垂直尺寸的电熔丝和电阻器。 包括导体或半导体的导电结构形成在半导体衬底上。 在导电结构上形成至少一个绝缘体层。 在所述至少一个绝缘体层中形成凹陷区域。 将自组装嵌段共聚物施加到凹陷区域中并退火以形成第一组聚合物嵌段和第二组聚合物嵌段。 第一组聚合物嵌段被选择性蚀刻到第二组和至少一个绝缘体层。 具有亚光刻尺寸的特征形成在至少一个绝缘体层和/或导电结构中。 形成具有亚光刻尺寸的各种半导体结构，其包括电熔丝和电阻器。
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公开(公告)号：US20090032959A1
公开(公告)日：2009-02-05
申请号：US11831236
申请日：2007-07-31
申请人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
发明人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
IPC分类号： H01L23/52
CPC分类号： H01L23/5256 , H01L21/0337 , H01L21/31144 , H01L21/32139 , H01L21/76816 , H01L23/5226 , H01L23/5228 , H01L27/101 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a first set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
摘要翻译： 提供具有亚光刻横向或垂直尺寸的电熔丝和电阻器。 包括导体或半导体的导电结构形成在半导体衬底上。 在导电结构上形成至少一个绝缘体层。 在所述至少一个绝缘体层中形成凹陷区域。 将自组装嵌段共聚物施加到凹陷区域中并退火以形成第一组聚合物嵌段和第二组聚合物嵌段。 第一组聚合物嵌段被选择性蚀刻到第二组和至少一个绝缘体层。 具有亚光刻尺寸的特征形成在至少一个绝缘体层和/或导电结构中。 形成具有亚光刻尺寸的各种半导体结构，其包括电熔丝和电阻器。
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公开(公告)号：US20100283121A1
公开(公告)日：2010-11-11
申请号：US12765275
申请日：2010-04-22
申请人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
发明人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
IPC分类号： H01L23/525
CPC分类号： H01L23/5256 , H01L21/0337 , H01L21/31144 , H01L21/32139 , H01L21/76816 , H01L23/5226 , H01L23/5228 , H01L27/101 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a fist set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
摘要翻译： 提供具有亚光刻横向或垂直尺寸的电熔丝和电阻器。 包括导体或半导体的导电结构形成在半导体衬底上。 在导电结构上形成至少一个绝缘体层。 在所述至少一个绝缘体层中形成凹陷区域。 将自组装嵌段共聚物施加到凹陷区域中并退火以形成第一组聚合物嵌段和第二组聚合物嵌段。 第一组聚合物嵌段被选择性蚀刻到第二组和至少一个绝缘体层。 具有亚光刻尺寸的特征形成在至少一个绝缘体层和/或导电结构中。 形成具有亚光刻尺寸的各种半导体结构，其包括电熔丝和电阻器。
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公开(公告)号：US08513769B2
公开(公告)日：2013-08-20
申请号：US12765275
申请日：2010-04-22
申请人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
发明人： Charles T. Black , Matthew E. Colburn , Timothy J. Dalton , Daniel C. Edelstein , Wai-Kin Li , Anthony K. Stamper , Haining S. Yang
IPC分类号： H01L23/5256 , H01L23/5329 , H01L21/7682
CPC分类号： H01L23/5256 , H01L21/0337 , H01L21/31144 , H01L21/32139 , H01L21/76816 , H01L23/5226 , H01L23/5228 , H01L27/101 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a fist set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
摘要翻译： 提供具有亚光刻横向或垂直尺寸的电熔丝和电阻器。 包括导体或半导体的导电结构形成在半导体衬底上。 在导电结构上形成至少一个绝缘体层。 在所述至少一个绝缘体层中形成凹陷区域。 将自组装嵌段共聚物施加到凹陷区域中并退火以形成第一组聚合物嵌段和第二组聚合物嵌段。 第一组聚合物嵌段被选择性蚀刻到第二组和至少一个绝缘体层。 具有亚光刻尺寸的特征形成在至少一个绝缘体层和/或导电结构中。 形成具有亚光刻尺寸的各种半导体结构，其包括电熔丝和电阻器。
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5.发明授权Method for fabricating self-aligned nanostructure using self-assembly block copolymers, and structures fabricated therefrom 有权使用自组装嵌段共聚物制造自对准纳米结构的方法，以及由其制造的结构公开(公告)号：US07993816B2
公开(公告)日：2011-08-09
申请号：US12049780
申请日：2008-03-17
IPC分类号： G03F7/26
CPC分类号： G03F7/039 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： In one embodiment, the present invention provides a method for patterning a surface that includes forming a block copolymer atop a heterogeneous reflectivity surface, wherein the block copolymer is segregated into first and second units; applying a radiation to the first units and second units, wherein the heterogeneous reflectivity surface produces an exposed portion of the first units and the second units; and applying a development cycle to selectively remove at least one of the exposed first and second units of the segregated copolymer film to provide a pattern.
摘要翻译： 在一个实施方案中，本发明提供了一种用于图案化表面的方法，其包括在异质反射表面之上形成嵌段共聚物，其中嵌段共聚物分离成第一和第二单元; 对所述第一单元和第二单元施加辐射，其中所述异质反射表面产生所述第一单元和所述第二单元的暴露部分; 并且施加开发周期以选择性地去除所述分离的共聚物膜的暴露的第一和第二单元中的至少一个以提供图案。
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6.发明申请METHOD FOR FABRICATING SELF-ALIGNED NANOSTRUCTURE USING SELF-ASSEMBLY BLOCK COPOLYMERS, AND STRUCTURES FABRICATED THEREFROM 有权使用自组装嵌段共聚物制备自对准纳米结构的方法及其制备的结构公开(公告)号：US20090233236A1
公开(公告)日：2009-09-17
申请号：US12049780
申请日：2008-03-17
IPC分类号： G03F7/00
CPC分类号： G03F7/039 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： In one embodiment, the present invention provides a method for patterning a surface that includes forming a block copolymer atop a heterogeneous reflectivity surface, wherein the block copolymer is segregated into first and second units; applying a radiation to the first units and second units, wherein the heterogeneous reflectivity surface produces an exposed portion of the first units and the second units; and applying a development cycle to selectively remove at least one of the exposed first and second units of the segregated copolymer film to provide a pattern.
摘要翻译： 在一个实施方案中，本发明提供了一种用于图案化表面的方法，其包括在异质反射表面之上形成嵌段共聚物，其中嵌段共聚物分离成第一和第二单元; 对所述第一单元和第二单元施加辐射，其中所述异质反射表面产生所述第一单元和所述第二单元的暴露部分; 并且施加开发周期以选择性地去除所述分离的共聚物膜的暴露的第一和第二单元中的至少一个以提供图案。
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公开(公告)号：US08486511B2
公开(公告)日：2013-07-16
申请号：US13430177
申请日：2012-03-26
IPC分类号： B32B3/00
CPC分类号： H01L21/0338 , B81B2203/0369 , B81C1/00031 , B81C2201/0149 , B81C2201/0198 , B82Y30/00 , H01L21/0337 , H01L51/0017 , Y10S977/882 , Y10S977/887 , Y10S977/888 , Y10T428/24479 , Y10T428/2457 , Y10T428/24612 , Y10T428/24736 , Y10T428/24802
摘要： In one embodiment, Hexagonal tiles encompassing a large are divided into three groups, each containing ⅓ of all hexagonal tiles that are disjoined among one another. Openings for the hexagonal tiles in each group are formed in a template layer, and a set of self-assembling block copolymers is applied and patterned within each opening. This process is repeated three times to encompass all three groups, resulting in a self-aligned pattern extending over a wide area. In another embodiment, the large area is divided into rectangular tiles of two non-overlapping and complementary groups. Each rectangular area has a width less than the range of order of self-assembling block copolymers. Self-assembled self-aligned line and space structures are formed in each group in a sequential manner so that a line and space pattern is formed over a large area extending beyond the range of order.
摘要翻译： 在一个实施例中，包括大的六边形瓦片被分成三组，每组包含彼此分离的所有六边形瓦片的1/3。 每个组中的六边形瓦片的开口形成在模板层中，并且在每个开口内施加并组合一组自组装嵌段共聚物。 该过程重复三次以包含所有三组，导致在大面积上延伸的自对准图案。 在另一个实施例中，大面积被分成两个不重叠和互补组的矩形瓦片。 每个矩形区域的宽度小于自组装嵌段共聚物的顺序范围。 在每组中以顺序的方式形成自组装的自对准线和空间结构，使得在超过有序范围的大面积上形成线和空间图案。
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8.发明授权Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter 有权波导偏振分束器及制造波导线栅偏振光束分离器的方法公开(公告)号：US07486845B2
公开(公告)日：2009-02-03
申请号：US11870463
申请日：2007-10-11
申请人： Charles T. Black , Gian-Luca Bona , Timothy J. Dalton , Nicholas C. M. Fuller , Roland Germann , Maurice McGlashan-Powell , Chandrasekhar Narayan , Robert L. Sandstorm
发明人： Charles T. Black , Gian-Luca Bona , Timothy J. Dalton , Nicholas C. M. Fuller , Roland Germann , Maurice McGlashan-Powell , Chandrasekhar Narayan , Robert L. Sandstorm
CPC分类号： G02B6/126 , B29D11/00759 , G02B6/136 , G02B2006/1215
摘要： A method in effectuating the redirection of light which is propagated within a waveguide, and which eliminates the necessity for a bending of the waveguide, or the drawbacks encountered in directional changes in propagated light involving the need for sharp curves of essentially small-sized radii, which would resultingly lead to excessive losses in light. In this connection, the method relates to the fabricating and the provision of a wire-grid polarization beam splitter within an optical waveguide, which utilizes a diblock copolymer template to formulate the wire-grid.
摘要翻译： 实现在波导内传播的光的重定向并且消除波导的弯曲的必要性的方法或者涉及需要基本上小的半径的尖锐曲线的传播光的方向性变化中遇到的缺点， 这将导致轻微的过度损失。 在这方面，该方法涉及在光波导内制造和提供线栅偏振分束器，其利用二嵌段共聚物模板来配制线栅。
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公开(公告)号：US08486512B2
公开(公告)日：2013-07-16
申请号：US13430179
申请日：2012-03-26
IPC分类号： B32B3/00
CPC分类号： H01L21/0338 , B81B2203/0369 , B81C1/00031 , B81C2201/0149 , B81C2201/0198 , B82Y30/00 , H01L21/0337 , H01L51/0017 , Y10S977/882 , Y10S977/887 , Y10S977/888 , Y10T428/24479 , Y10T428/2457 , Y10T428/24612 , Y10T428/24736 , Y10T428/24802
摘要： In one embodiment, Hexagonal tiles encompassing a large are divided into three groups, each containing ⅓ of all hexagonal tiles that are disjoined among one another. Openings for the hexagonal tiles in each group are formed in a template layer, and a set of self-assembling block copolymers is applied and patterned within each opening. This process is repeated three times to encompass all three groups, resulting in a self-aligned pattern extending over a wide area. In another embodiment, the large area is divided into rectangular tiles of two non-overlapping and complementary groups. Each rectangular area has a width less than the range of order of self-assembling block copolymers. Self-assembled self-aligned line and space structures are formed in each group in a sequential manner so that a line and space pattern is formed over a large area extending beyond the range of order.
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公开(公告)号：US20120138571A1
公开(公告)日：2012-06-07
申请号：US12026123
申请日：2008-02-05
CPC分类号： H01L21/0338 , B81B2203/0369 , B81C1/00031 , B81C2201/0149 , B81C2201/0198 , B82Y30/00 , H01L21/0337 , H01L51/0017 , Y10S977/882 , Y10S977/887 , Y10S977/888 , Y10T428/24479 , Y10T428/2457 , Y10T428/24612 , Y10T428/24736 , Y10T428/24802
摘要： In one embodiment, Hexagonal tiles encompassing a large are divided into three groups, each containing ⅓ of all hexagonal tiles that are disjoined among one another. Openings for the hexagonal tiles in each group are formed in a template layer, and a set of self-assembling block copolymers is applied and patterned within each opening. This process is repeated three times to encompass all three groups, resulting in a self-aligned pattern extending over a wide area. In another embodiment, the large area is divided into rectangular tiles of two non-overlapping and complementary groups. Each rectangular area has a width less than the range of order of self-assembling block copolymers. Self-assembled self-aligned line and space structures are formed in each group in a sequential manner so that a line and space pattern is formed over a large area extending beyond the range of order.
摘要翻译： 在一个实施例中，包括大的六边形瓦片被分成三组，每组包含彼此分离的所有六边形瓦片的1/3。 每个组中的六边形瓦片的开口形成在模板层中，并且在每个开口内施加并组合一组自组装嵌段共聚物。 该过程重复三次以包含所有三组，导致在大面积上延伸的自对准图案。 在另一个实施例中，大面积被分成两个不重叠和互补组的矩形瓦片。 每个矩形区域的宽度小于自组装嵌段共聚物的顺序范围。 在每组中以顺序的方式形成自组装的自对准线和空间结构，使得在超过有序范围的大面积上形成线和空间图案。
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