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公开(公告)号：US10175448B2
公开(公告)日：2019-01-08
申请号：US14331315
申请日：2014-07-15
Applicant: Cisco Technology, Inc.
Inventor： Mary Nadeau , Vipulkumar Patel , Prakash Gothoskar , John Fangman , John Matthew Fangman , Mark Webster
Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.
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Patent Agency Ranking
公开(公告)号：US12237643B2
公开(公告)日：2025-02-25
申请号：US17302964
申请日：2021-05-17
Applicant: Cisco Technology, Inc.
Inventor： Norbert Schlepple , Jock T. Bovington , Mary Nadeau , Mittu Pannala , Jarrett S. Neiman
IPC: H01S5/024 , H01S5/02 , H01S5/02326
Abstract: Heatsinking in laser devices may be improved via a device, including: a header disk having a first face with a circumference; a header post that is thermally conductive, and having: a second face connected to the first face coterminously with the circumference; a third face opposite to the second face; and a fourth face perpendicular to the second face and the third face; a lens holder, having a fifth face connected to the third face; and an optical subassembly connected to the fourth face and optically aligned with the lens holder. The device may also be understood to comprise: a header disk having a circumference; a header post that is thermally conductive, the header post having: an arc coterminous to a portion of the circumference; a mounting face, perpendicular to a plane in which the arc and the circumference are defined; and a bonding face perpendicular to the mounting face.
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公开(公告)号：US10608404B2
公开(公告)日：2020-03-31
申请号：US15431840
申请日：2017-02-14
Applicant: Cisco Technology, Inc.
Inventor： Mary Nadeau , Jarrett S. Neiman , Mittu Pannala
Abstract: A laser light source, a submount for a semiconductor laser, and a method of providing a laser light source are provided. The laser light source includes a submount with first and second electrical contacts thereon and a trench there-between. A semiconductor laser is bonded to the submount by bonding third and fourth electrical contacts of the laser to the first and second electrical contacts, respectively. The third and fourth electrical contacts of the laser are arranged on opposite side of a laser active stripe, which is arranged over the trench of the submount.
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公开(公告)号：US09864133B2
公开(公告)日：2018-01-09
申请号：US15208658
申请日：2016-07-13
Applicant: Cisco Technology ,Inc.
Inventor： Vipulkumar Patel , Mark Webster , Ravi Tummidi , Mary Nadeau
CPC classification number: G02B6/12004 , G02B6/12002 , G02B6/1228 , G02B6/124 , G02B6/125 , G02B6/305 , G02B6/34 , G02B6/4206 , G02B6/4274 , G02B6/4291
Abstract: The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.
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公开(公告)号：US10481326B2
公开(公告)日：2019-11-19
申请号：US15899255
申请日：2018-02-19
Applicant: Cisco Technology, Inc.
Inventor： Vipulkumar Patel , Mark Webster , Ravi Tummidi , Mary Nadeau
Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.
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公开(公告)号：US09933566B2
公开(公告)日：2018-04-03
申请号：US15143944
申请日：2016-05-02
Applicant: Cisco Technology, Inc.
Inventor： Vipulkumar Patel , Mark Webster , Ravi Tummidi , Mary Nadeau
CPC classification number: G02B6/12004 , G02B6/12002 , G02B6/1228 , G02B6/124 , G02B6/125 , G02B6/305 , G02B6/34 , G02B6/4206 , G02B6/4274 , G02B6/4291
Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.
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