公开(公告)号：US20210165167A1

公开(公告)日：2021-06-03

申请号：US17171216

申请日：2021-02-09

申请人： Cisco Technology, Inc.

发明人： Neeraj Kumar Dubey ,  Adam Jacob Forrer ,  Steven Luther Moyer ,  Prakash Gothoskar

IPC分类号： G02B6/36

摘要： Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.

公开(公告)号：US09766484B2

公开(公告)日：2017-09-19

申请号：US14248081

申请日：2014-04-08

申请人： CISCO TECHNOLOGY, INC.

发明人： Donald Adams ,  Prakash Gothoskar ,  Vipulkumar Patel ,  Mark Webster

IPC分类号： G02F1/025 ,  G02B6/13 ,  G02B6/12 ,  G02F1/01 ,  G02B6/132 ,  G02B6/136 ,  G02F1/225 ,  G02F1/015

CPC分类号： G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

摘要： An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.

公开(公告)号：US09419718B2

公开(公告)日：2016-08-16

申请号：US14462239

申请日：2014-08-18

申请人： Cisco Technology, Inc.

发明人： Prakash Gothoskar ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Rao V. Yelamarty

IPC分类号： G02B5/08 ,  G02B6/28 ,  H04B10/40 ,  G02B6/42

CPC分类号： H04B10/40 ,  G02B6/4215 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4249

摘要： Embodiments described herein describe a sub-mount that is etched to include respective cavities with at least two adjacent sides that align optical filters and a mirror. Moreover, the cavities are arranged on the sub-mount such that when the filters and mirror are disposed in the cavities, they align in a manner that enables the performance of a multiplexing or demultiplexing function as part of, for example, a zigzag multiplexer/demultiplexer. In one embodiment, the filters and mirrors are aligned passively rather than actively. The sub-mount may then be placed on a substrate that includes other components of a ROSA or TOSA. In one embodiment, the substrate is also etched to include a cavity two adjacent sides to align the sub-mount so that sub-mount is passively aligned once disposed into the cavity.

摘要翻译： 本文所述的实施例描述了一种子座，其被蚀刻以包括具有对准光学滤光器和反射镜的至少两个相邻侧的相应空腔。 此外，空腔被布置在子安装座上，使得当滤光器和反射镜设置在空腔中时，它们以使得能够执行复用或解复用功能作为例如锯齿形复用器/ 解复用器 在一个实施例中，滤波器和反射镜被动地而不是主动对准。 然后可以将该子安装件放置在包括ROSA或TOSA的其它部件的基板上。 在一个实施例中，衬底也被蚀刻以包括两个相邻侧面的空腔以对准子安装座，使得一旦设置在空腔中，子安装座被动地对准。

公开(公告)号：US11609382B2

公开(公告)日：2023-03-21

申请号：US17171216

申请日：2021-02-09

申请人： Cisco Technology, Inc.

发明人： Neeraj Kumar Dubey ,  Adam Jacob Forrer ,  Steven Luther Moyer ,  Prakash Gothoskar

IPC分类号： G02B6/38 ,  G02B6/36

摘要： Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.

公开(公告)号：US09632335B2

公开(公告)日：2017-04-25

申请号：US15009483

申请日：2016-01-28

申请人： Cisco Technology, Inc.

发明人： Vipulkumar Patel ,  Prakash Gothoskar

IPC分类号： G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/225 ,  G02F1/01 ,  G02F1/015

CPC分类号： G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

摘要： An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.

公开(公告)号：US09360688B2

公开(公告)日：2016-06-07

申请号：US14263389

申请日：2014-04-28

申请人： Cisco Technology, Inc.

发明人： Vipulkumar Patel ,  Prakash Gothoskar ,  Sean Anderson

IPC分类号： G02F1/025 ,  G02F1/01 ,  G02F1/225 ,  B82Y20/00 ,  G02F1/21

CPC分类号： G02F1/025 ,  G02B6/132 ,  G02B6/136 ,  G02F1/011 ,  G02F1/2257 ,  G02F2001/0152

摘要： An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. In one embodiment, the lower waveguide may include a u-shaped region within an optical mode of the light passing through the optical modulator. By conforming the dielectric layer to the surfaces of the u-shaped region, the amount of area of the dielectric layer within a charge modulation region is increased relative to forming the dielectric layer on a single plane. Folding the dielectric layer in this manner may improve modulation efficiency. In one embodiment, the u-shaped region is formed by using ridge structures that extend from an upper surface of the lower waveguide towards the upper waveguide. To aid in lateral confinement of the optical mode, the dielectric layer may be deposited on one side surface of the ridge structures while a different dielectric material is deposited on the opposite side surface.

摘要翻译： 光调制器可以包括下波导，上波导和介于其间的电介质层。 在一个实施例中，下波导可以包括通过光调制器的光的光学模式内的u形区域。 通过使介电层与U形区域的表面相一致，相对于在单个平面上形成电介质层，电荷调制区域内的电介质层的面积增加。 以这种方式折叠介电层可以提高调制效率。 在一个实施例中，通过使用从下波导的上表面向上波导延伸的脊结构形成U形区域。 为了有助于光学模式的横向限制，介电层可以沉积在脊结构的一个侧表面上，而不同的电介质材料沉积在相对的侧表面上。

公开(公告)号：US09978890B1

公开(公告)日：2018-05-22

申请号：US15440209

申请日：2017-02-23

申请人： Cisco Technology, Inc.

发明人： Igal I. Bayn ,  Vipulkumar Patel ,  Sean P. Anderson ,  Prakash Gothoskar

IPC分类号： H01L31/00 ,  H01L31/0232 ,  H01L31/105 ,  H01L31/0352 ,  G02B6/125 ,  G02B6/12

CPC分类号： G02B6/12 ,  G02B6/125 ,  G02B2006/12061 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/105

摘要： Embodiments herein describe a photonic device that includes a germanium photodetector coupled to multiple silicon waveguides. In one embodiment, the silicon waveguides optically couple to a layer of germanium material. In one embodiment, if the germanium material forms a polygon, then a respective silicon waveguide optically couple to each of the corners of the polygon. Each of the plurality of input silicon waveguides may be arranged to transmit light in a direction under the germanium that is offset relative to both sides of the germanium forming the respective corner. In another example, the germanium material may be a circle or ellipse in which case the silicon waveguides terminate at or close to a non-straight, curved surface of the germanium material. As described below, optically coupling the silicon waveguides at a non-straight surface can reduce the distance charge carriers have to travel in the optical detector which can improve bandwidth.

公开(公告)号：US10175448B2

公开(公告)日：2019-01-08

申请号：US14331315

申请日：2014-07-15

申请人： Cisco Technology, Inc.

发明人： Mary Nadeau ,  Vipulkumar Patel ,  Prakash Gothoskar ,  John Fangman ,  John Matthew Fangman ,  Mark Webster

IPC分类号： G02B7/02 ,  H01L23/544 ,  G02B6/42 ,  G02B7/00 ,  H01L23/34 ,  H01L23/00

摘要： An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.

公开(公告)号：US10976498B2

公开(公告)日：2021-04-13

申请号：US16695486

申请日：2019-11-26

申请人： Cisco Technology, Inc.

发明人： Neeraj Kumar Dubey ,  Adam Jacob Forrer ,  Steven Luther Moyer ,  Prakash Gothoskar

IPC分类号： G02B6/36

摘要： Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.

公开(公告)号：US09343450B2

公开(公告)日：2016-05-17

申请号：US14276566

申请日：2014-05-13

申请人： Cisco Technology, Inc.

发明人： Kalpendu Shastri ,  Vipulkumar Patel ,  Mark Webster ,  Prakash Gothoskar ,  Ravinder Kachru ,  Soham Pathak ,  Rao V. Yelamarty ,  Thomas Daugherty ,  Bipin Dama ,  Kaushik Patel ,  Kishor Desai

IPC分类号： H01L21/00 ,  H01L25/00 ,  G02B6/42 ,  H01L25/16

CPC分类号： H01L25/50 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4245 ,  G02B6/4249 ,  G02B6/4257 ,  G02B6/426 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

摘要： A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

摘要翻译： 光电子收发器组件过程的晶片级实现利用硅晶片作为光学参考平面和平台，同时为多个单独的收发器模块组装所有必需的光学和电子部件。 特别地，硅晶片被用作“平台”（插入器），在其上安装或集成多个收发器模块的所有组件，硅插入器的顶表面用作参考平面，用于定义 分离光学元件之间的光信号路径。 实际上，通过使用单个硅晶片作为大量单独的收发器模块的平台，可以使用晶片尺度组装过程以及这些模块的光学对准和测试。