公开(公告)号：US20240146500A1

公开(公告)日：2024-05-02

申请号：US17978582

申请日：2022-11-01

Applicant: Sundar Krishnamurthy ,  Deepak Dasalukunte ,  Conor O'Keeffe ,  Finbarr O'Regan ,  Amy Whitcombe

Inventor： Sundar Krishnamurthy ,  Deepak Dasalukunte ,  Conor O'Keeffe ,  Finbarr O'Regan ,  Amy Whitcombe

IPC: H04L7/00 ,  H04B10/079 ,  H04B10/118 ,  H04L7/033 ,  H04L7/04

CPC classification number: H04L7/0075 ,  H04B10/07955 ,  H04B10/118 ,  H04L7/0029 ,  H04L7/0331 ,  H04L7/048

Abstract: A clock data recovery (CDR) apparatus can include an interpolator circuitry to interpolate an input received signal and to generate an output signal removing the sampling clock offsets. The apparatus can include timing error detector (TED) circuitry coupled to process the output signal and to provide a timing error as feedback to the interpolator circuitry, the timing error being adjusted by gain factors used in at least one of an automatic gain control (AGC) circuitry and an orthogonalization circuitry. The apparatus can include loop filter (LF) circuitry to filter the timing error to remove noise effects. The apparatus can include numerically controlled oscillator (NCO) circuitry to adjust for a basepoint and fractional interval used to adjust resampling coefficients within the interpolator circuitry.

公开(公告)号：US09628256B2

公开(公告)日：2017-04-18

申请号：US13885221

申请日：2011-11-15

Applicant: Conor O'Keeffe ,  Michael O'Brien

Inventor： Conor O'Keeffe ,  Michael O'Brien

IPC: H04B17/00 ,  H04L7/00 ,  H01Q3/26 ,  H04B7/10 ,  H04B17/12 ,  H04B17/21

CPC classification number: H04L7/0016 ,  H01Q3/267 ,  H04B7/10 ,  H04B17/12 ,  H04B17/21

Abstract: A multiple input multiple output (MIMO) calibration device (360) for calibrating a phase relationship between at least two signals present on at least two radio frequency (RF) paths coupling a wireless communication unit and the MIMO calibration device (360) is described. The MIMO calibration device (360) is operably coupleable via at least two RF paths between a wireless communication unit and an antenna arrangement (219). The calibration device (360) comprises a processing module (490) configured to: process a coupled amount of at least one first signal from a first path operably coupleable to a first polarization of the antenna arrangement (219) to determine at least one pilot signal from said at least one first signal; process a coupled amount of at least one second signal from a second path operably coupleable to at least one second polarization feed of antenna arrangement (219), different to the first polarization, to determine the at least one pilot signal from said at least one second signal; and determine a first phase relationship of the same pilot signal between the at least two RF paths.

公开(公告)号：US09035828B2

公开(公告)日：2015-05-19

申请号：US13201566

申请日：2010-02-10

Applicant: Conor O'Keeffe ,  Michael O'Brien

Inventor： Conor O'Keeffe ,  Michael O'Brien

IPC: H01Q3/26 ,  H04B17/00 ,  H01Q1/24 ,  H04B7/10

CPC classification number: H01Q3/267 ,  H01Q1/246 ,  H04B7/10 ,  H04B17/0085 ,  H04B17/12 ,  H04B17/20 ,  H04B17/21

Abstract: A method for calibrating (700) an antenna array comprises a plurality of antenna elements coupled to a plurality of respective receive paths in a wireless communication system. The method comprises, in receive mode, applying a test signal to an individual single receive path (715) of the plurality of receive paths; and feeding back the test signal via a switched coupler network. The method further comprises running a receive calibration measurement routine to determine at least one measurement value used to calibrate the individual signal receive path and waiting for at least one converged measurement value; and extracting (720) the converged measurement value for at least one individual receive path. The steps of applying, running, extracting for a next individual single receive path are repeated until the calibration routine has completed (725). The method further comprises selecting a converged measurement value of at least one individual receive path from a plurality of receive paths (730) to form a reference receiver calibration result (730); normalizing a plurality of at least one measurement values of the plurality of receive paths using the reference receiver calibration result (730); and applying a normalized value to at least one of the plurality of receive paths.

Abstract translation: 用于校准（700）天线阵列的方法包括耦合到无线通信系统中的多个相应接收路径的多个天线元件。 该方法包括在接收模式下，将测试信号施加到多个接收路径中的单个单个接收路径（715）; 并通过交换耦合器网络反馈测试信号。 该方法还包括运行接收校准测量程序以确定用于校准各个信号接收路径和等待至少一个会聚测量值的至少一个测量值; 以及提取（720）用于至少一个个体接收路径的收敛测量值。 重复下一个单个接收路径的应用，运行，提取步骤，直到校准程序完成（725）。 该方法还包括从多个接收路径（730）中选择至少一个单独接收路径的会聚测量值以形成参考接收机校准结果（730）; 使用参考接收机校准结果对所述多个接收路径的多个至少一个测量值进行归一化（730）; 以及将归一化值应用于所述多个接收路径中的至少一个。

公开(公告)号：US08982899B2

公开(公告)日：2015-03-17

申请号：US11574867

申请日：2004-09-07

Applicant: Conor O'Keeffe ,  Paul Kelleher ,  Daniel Schwartz

Inventor： Conor O'Keeffe ,  Paul Kelleher ,  Daniel Schwartz

IPC: G06F13/42

CPC classification number: G06F13/4291

Abstract: An apparatus comprises a number of sub-systems and a control interface operably coupled to sub-systems for routing data therebetween. A strobe generation function is operably coupled to the control interface and configured to generate a plurality of different strobe signals to differentiate between different intended receiving devices. Thus, different strobe signals may be multiplexed onto a single control interface link, based on a pulse width or voltage magnitude characteristics of the respective strobe signals. A strobe decoder function is operably coupled to the control interface and configured to decode a plurality of different strobe signals to differentiate between triggering sub-systems on receiving devices.

Abstract translation: 一种装置包括多个子系统和可操作地耦合到子系统的控制接口，用于在它们之间路由数据。 选通生成功能可操作地耦合到控制接口并且被配置为生成多个不同的选通信号以区分不同的预期接收设备。 因此，可以基于相应选通信号的脉冲宽度或电压幅度特性，将不同的选通信号复用到单个控制接口链路上。 选通解码器功能可操作地耦合到控制接口并且被配置为解码多个不同的选通信号以区分接收设备上的触发子系统。

公开(公告)号：US08693968B2

公开(公告)日：2014-04-08

申请号：US12523933

申请日：2007-01-22

Applicant: Norman Beamish ,  Michael Milyard ,  Conor O'Keeffe

Inventor： Norman Beamish ,  Michael Milyard ,  Conor O'Keeffe

IPC: H04B17/00 ,  H04B1/06 ,  H04B7/00 ,  H04B1/10

CPC classification number: H03J7/02

Abstract: A very low intermediate frequency (VLIF) receiver comprising a first and second mixer circuits, characterised in that receiver comprises a means of estimating the energy in a desired signal band; a means of estimating the energy in a band of frequencies comprising the desired signal band; and a means of altering a VLIF of the receiver according to the ratio of the energy in a desired signal band and the energy in the band of frequencies comprising the desired signal band.

Abstract translation: 包括第一和第二混频器电路的非常低的中频（VLIF）接收机，其特征在于接收机包括估计期望信号频带中的能量的装置; 估计包含所需信号频带的频带中的能量的装置; 以及根据期望信号频带中的能量与包括期望信号频带的频带中的能量的比率来改变接收机的VLIF的装置。

公开(公告)号：US08675685B2

公开(公告)日：2014-03-18

申请号：US13061626

申请日：2008-09-05

Applicant: Paul Kelleher ,  Michael O'Brien ,  Conor O'Keeffe

Inventor： Paul Kelleher ,  Michael O'Brien ,  Conor O'Keeffe

IPC: H04J3/24

CPC classification number: H04W56/0045 ,  H04B1/40 ,  H04B15/02 ,  H04B2215/067

Abstract: A semiconductor device comprising interface logic for transmitting data bursts across an interface. The interface logic is arranged to transmit bursts of data across the interface such that the start of a burst of data is substantially aligned with a symbol interval (SI) boundary. The interface logic is further arranged to apply an offset to the SI boundary at the start of the burst of data.

Abstract translation: 一种半导体器件，包括用于通过接口传输数据脉冲串的接口逻辑。 接口逻辑被布置成通过接口传输数据脉冲串，使得数据突发的开始基本上与符号间隔（SI）边界对齐。 接口逻辑还被布置为在数据突发的开始处向SI边界应用偏移。

公开(公告)号：US20100203919A1

公开(公告)日：2010-08-12

申请号：US12671239

申请日：2007-08-09

Applicant: Paul Kelleher ,  Michael Crowley ,  Conor O'Keeffe

Inventor： Paul Kelleher ,  Michael Crowley ,  Conor O'Keeffe

IPC: H04B1/38

CPC classification number: H04B1/40

Abstract: A master radiofrequency integrated circuit (RF IC) and a slave radiofrequency integrated circuit include a master radiofrequency module and a slave radiofrequency module, respectively. Both RF ICs include a radiofrequency side contact connectable to an antenna, for receiving radiofrequency signals, via the antenna, from a wireless communications network and a baseband side contact connected to the radiofrequency module and connectable to a contact of a baseband integrated circuit, for transmitting the baseband signals from the master radiofrequency module to the baseband integrated circuit. The RF module is connected to the radiofrequency side contact, for converting the radiofrequency signals into baseband signals. The master radiofrequency module includes a slave control unit for controlling the slave radiofrequency module. The master RF IC has a slave side contact connected to the slave control unit and to the slave RF IC, for transferring a control signal or data from and/or to slave radiofrequency module when the slave radiofrequency module is connected to the contact of the baseband integrated circuit. The slave RF IC includes a master side contact connected to a control interface of the slave RF module and connectable to a master radiofrequency module on another RF IC, for receiving the control signals from the master radiofrequency module.

Abstract translation: 主射频集成电路（RF IC）和从射频集成电路分别包括主射频模块和从射频模块。 RF IC都包括可连接到天线的射频侧触点，用于经由天线从无线通信网络和连接到射频模块的基带侧接点接收射频信号，并且可连接到基带集成电路的触点，用于发送 从主射频模块到基带集成电路的基带信号。 RF模块连接到射频侧触点，用于将射频信号转换为基带信号。 主射频模块包括用于控制从射频模块的从控制单元。 主RF IC具有从属侧接点连接到从控制单元和从RF IC，用于当从射频模块连接到基带的接点时，将来自和/或从属射频模块的控制信号或数据传送到从射频模块 集成电路。 从RF IC包括连接到从RF模块的控制接口并连接到另一RF IC上的主射频模块的主侧触点，用于从主射频模块接收控制信号。

公开(公告)号：US20100086016A1

公开(公告)日：2010-04-08

申请号：US12532784

申请日：2007-03-27

Applicant: Norman Beamish ,  Alan Rannon ,  Anthony Dunne ,  Conor O'Keeffe

Inventor： Norman Beamish ,  Alan Rannon ,  Anthony Dunne ,  Conor O'Keeffe

IPC: H04B17/00 ,  H04L27/06 ,  H03M1/12

CPC classification number: H03M3/49

Abstract: A communications device comprises a receiver for receiving an input signal operably coupled to analogue to digital converter logic. The analogue to digital converter logic is operably coupled to control logic via a signal analyser arranged to analyse a converted received input signal, output from the analogue to digital converter logic to determine at least one characteristic of the received signal. The control logic is arranged to vary a dynamic range of the analogue to digital converter logic depending on the at least one determined characteristic of the received input signal.

Abstract translation: 通信设备包括用于接收可操作地耦合到模数转换器逻辑的输入信号的接收器。 模拟到数字转换器逻辑经由信号分析器可操作地耦合到控制逻辑器，信号分析器被布置成分析经转换的接收输入信号，从模数转换器逻辑输出以确定接收信号的至少一个特性。 控制逻辑被布置成根据所接收的输入信号的至少一个确定的特性来改变模数转换器逻辑的动态范围。

公开(公告)号：US20070254599A1

公开(公告)日：2007-11-01

申请号：US11574756

申请日：2004-09-06

Applicant: Conor O'Keeffe ,  Paul Kelleher

Inventor： Conor O'Keeffe ,  Paul Kelleher

IPC: H04B1/40

CPC classification number: H04B1/40 ,  H04B15/02 ,  H04B2215/064 ,  H04B2215/065

Abstract: A wireless communication device comprises a number of sub-systems operably coupled to a data interface for routing data between the number of sub-systems. A clock generation function generates a clock signal substantially at a data transfer rate to be used over the data interface whereby the clock signal is generated at a rate that minimises harmonic content of the clock signal at operational frequencies of the wireless communication device. Thus, a suitable data rate is selected and supported by the data interface that accommodates the desired bandwidth, clock rate and/or chip rate of the functional elements that are coupled by the data interface within the wireless communication device, whilst minimising the effects of harmonic interference from the clock signal(s).

Abstract translation: 无线通信设备包括可操作地耦合到数据接口的多个子系统，用于在子系统的数量之间路由数据。 时钟生成功能基本上以数据传输速率产生时钟信号，以在数据接口上使用，从而以使得在无线通信设备的工作频率下的时钟信号的谐波含量最小化的速率生成时钟信号。 因此，数据接口选择并支持合适的数据速率，该数据接口适应由无线通信设备内的数据接口耦合的功能元件的期望带宽，时钟速率和/或码片速率，同时最小化谐波的影响 来自时钟信号的干扰。

公开(公告)号：US08976849B2

公开(公告)日：2015-03-10

申请号：US12523934

申请日：2007-01-22

Applicant: Patrick Pratt ,  Hari Thirumoorthy ,  Conor O'Keeffe

Inventor： Patrick Pratt ,  Hari Thirumoorthy ,  Conor O'Keeffe

IPC: H04L27/14 ,  H03D3/00 ,  H04L27/00

CPC classification number: H03D3/009 ,  H04L27/0014 ,  H04L2027/0016

Abstract: A calibration signal generator for use in a balancing circuit calibration device in a radio receiver, the calibration signal generator comprising: a means of amplifying a clocking signal from a clocking signal generator to provide a first calibration signal; a means of generating a second calibration signal from the clocking signal, the first and second calibration signals being transmissible to a one or more mixing circuits in the balancing circuit calibration device; and a means synchronizing the operation of other circuit elements in the balancing circuit calibration device with the clocking signal; characterized in that the clocking signal generator is present in the radio receiver and used therein for other functions.

Abstract translation: 一种用于无线电接收机中的平衡电路校准装置的校准信号发生器，所述校准信号发生器包括：放大来自时钟信号发生器的时钟信号以提供第一校准信号的装置; 从所述时钟信号产生第二校准信号的装置，所述第一和第二校准信号可传输到所述平衡电路校准装置中的一个或多个混合电路; 以及将平衡电路校准装置中的其他电路元件的操作与时钟信号同步的装置; 其特征在于，时钟信号发生器存在于无线电接收机中并在其中用于其它功能。