ESTIMATING INTERNAL MULTIPLES IN SEISMIC DATA
    1.
    发明申请
    ESTIMATING INTERNAL MULTIPLES IN SEISMIC DATA 审中-公开
    估计地震数据中的内部乘数

    公开(公告)号:US20110199858A1

    公开(公告)日:2011-08-18

    申请号:US12707266

    申请日:2010-02-17

    IPC分类号: G01V1/00

    CPC分类号: G01V1/36 G01V2210/56

    摘要: A method for estimating internal multiples in seismic data. The method includes selecting a subset from a set of regularly sampled seismic data based on a low-discrepancy point set. The method may then include integrating one or more depth integrals of the inverse-scattering internal multiple prediction (ISIMP) algorithm over each data point in the subset. After integrating the depth integrals, the method may then include integrating a function of the integrated depth integrals using a quasi-Monte Carlo (QMC) integration over the subset, thereby generating an estimate of the internal multiples.

    摘要翻译: 一种估计地震数据内部倍数的方法。 该方法包括基于低差分点集从一组规则采样的地震数据中选择一个子集。 该方法然后可以包括在子集中的每个数据点上集成反散射内部多重预测(ISIMP)算法的一个或多个深度积分。 在积分深度积分之后,该方法可以包括使用在子集上的准蒙特卡罗(QMC)积分来积分积分深度积分的函数,从而生成内部倍数的估计。

    Composition for hydrogen generation
    2.
    发明授权
    Composition for hydrogen generation 失效
    用于氢气生成的组成

    公开(公告)号:US08048401B2

    公开(公告)日:2011-11-01

    申请号:US12156687

    申请日:2008-06-04

    申请人: Shih-Ying Hsu

    发明人: Shih-Ying Hsu

    IPC分类号: C01B3/08 C09K3/00

    摘要: A solid composition containing: (a) at least one metal hydride compound; (b) at least one borohydride compound; and (c) at least one of: (i) a transition metal halide, or (ii) a transition metal boride. A “metal hydride” is a compound containing only one metal and hydrogen, including, e.g., alkali and alkaline earth metal hydrides. A “borohydride compound” is a compound containing the borohydride anion, BH4−.

    摘要翻译: 一种固体组合物,其含有:(a)至少一种金属氢化物; (b)至少一种硼氢化合物; 和(c)至少一种:(i)过渡金属卤化物,或(ii)过渡金属硼化物。 “金属氢化物”是仅含有一种金属和氢的化合物,包括例如碱金属和碱土金属氢化物。 “硼氢化合物”是含有硼氢化物阴离子BH4-的化合物。

    Heat dissipating device
    4.
    发明申请
    Heat dissipating device 审中-公开
    散热装置

    公开(公告)号:US20050173096A1

    公开(公告)日:2005-08-11

    申请号:US10874434

    申请日:2004-06-22

    摘要: A heat dissipating device includes a fluid container made of a heat conductive material and having a heat-dissipating wall opposite to a heat-absorbing wall, and a surrounding wall cooperating with the heat-absorbing and heat-dissipating walls so as to confine a sealed vapor chamber. A heat exchanger member is disposed in the vapor chamber, is in heat-conductive contact with the heat-absorbing wall, and contains an amount of working fluid capable of changing into fluid vapor that fills the vapor chamber upon absorbing heat from the heat-absorbing wall. The fluid vapor is capable of changing into fluid condensate when cooled due to contact with the heat-dissipating wall. A heat-conductive cover plate is mounted spacedly on the heat-dissipating wall of the fluid container, and cooperates with the heat-dissipating wall so as to confine a heat-dissipating passage therebetween such that heat absorbed by the heat-dissipating wall is dissipated via the heat-dissipating passage.

    摘要翻译: 散热装置包括由导热材料制成并具有与吸热壁相对的散热壁的流体容器,以及与吸热和散热壁配合的周围壁,以限制密封 蒸气室。 热交换器构件设置在蒸气室中,与吸热壁导热接触,并且包含一定量的工作流体,该工作流体能够在从吸热层吸收热量时变成填充蒸气室的流体蒸气 壁。 当与散热壁接触时,流体蒸气能够变冷为冷凝液。 导热盖板间隔地安装在流体容器的散热壁上,并且与散热壁配合,以便在其间限制散热通道,从而消散由散热壁吸收的热量 通过散热通道。

    Method of fabricating self-aligned contact window which includes forming
a undoped polysilicon spacer that extends into a recess of the gate
structure
    5.
    发明授权
    Method of fabricating self-aligned contact window which includes forming a undoped polysilicon spacer that extends into a recess of the gate structure 失效
    制造自对准接触窗的方法,其包括形成延伸到栅极结构的凹部中的未掺杂的多晶硅间隔物

    公开(公告)号:US6037228A

    公开(公告)日:2000-03-14

    申请号:US249501

    申请日:1999-02-12

    申请人: Shih-Ying Hsu

    发明人: Shih-Ying Hsu

    CPC分类号: H01L21/76897 Y10S257/90

    摘要: A method of fabricating a self-aligned contact window is described. A gate oxide layer, a conductive layer, a first oxide layer and an undoped polysilicon layer are successively formed on a substrate. These layers above are patterned to form a gate structure. A water clean step is performed, producing a recess in the first oxide layer. A second oxide layer is thermally formed on the surface of the gate structure. An undoped polysilicon spacer is formed on the sidewall of the gate structure and a portion of the undoped polysilicon spacer extends into the recess of the first oxide layer. A dielectric layer is formed over the substrate and using the undoped polysilicon spacer as an etching stop, a self-aligned contact window is formed to expose the source/drain region.

    摘要翻译: 描述了制造自对准接触窗的方法。 在衬底上依次形成栅氧化层,导电层,第一氧化物层和未掺杂的多晶硅层。 上述这些层被图案化以形成栅极结构。 执行水清洁步骤,在第一氧化物层中产生凹陷。 第二氧化物层热形成在栅极结构的表面上。 在栅极结构的侧壁上形成未掺杂的多晶硅间隔物,并且未掺杂的多晶硅间隔物的一部分延伸到第一氧化物层的凹槽中。 在衬底上形成电介质层,并且使用未掺杂的多晶硅间隔物作为蚀刻停止件,形成自对准接触窗以暴露源极/漏极区域。

    Method for forming transistor devices with different spacer width
    8.
    发明授权
    Method for forming transistor devices with different spacer width 失效
    用于形成具有不同间隔宽度的晶体管器件的方法

    公开(公告)号:US06344398B1

    公开(公告)日:2002-02-05

    申请号:US09690514

    申请日:2000-10-17

    申请人: Shih-Ying Hsu

    发明人: Shih-Ying Hsu

    IPC分类号: H01L21336

    摘要: A method for forming transistor devices with different spacer width for mixed-mode IC is provided. The method provides three different kinds of transistor devices on a wafer, two of them have their own spacer with different width, while the remaining one is without a spacer. The method comprises providing a semiconductor substrate having at least a first conductive gate, a second conductive gate and a third conductive gate formed thereon, and forming a first oxide layer over the first conductive gate, the second conductive gate and the third conductive gate. Then, a first etch operation is performed to form an oxide spacer along each sidewall of the first conductive gate, the second conductive gate and the third conductive gate. A first mask is then formed over the first conductive gate, and then the spacer is removed formed along each sidewall of the second conductive gate and the third conductive gate. After that, the first mask over the first conductive gate is removed. Subsequently, a silicon nitride layer is formed with a thickness different from that of the first oxide layer over the first conductive gate, the second conductive gate and the third conductive gate. Then, a second etch operation is performed to form a spacer of silicon nitride along each sidewall of the second conductive gate and the third conductive gate. Thereafter, a second conformal oxide layer is formed over the first conductive gate, the second conductive gate and the third conductive gate. Subsequently, a second mask is formed over the second oxide layer formed on the second conductive gate, while exposing the second conformal oxide layer over the first conductive gate and the third conductive gate. The second oxide layer is removed, and then the second mask is removed. Finally, the spacer of silicon nitride is removed along each sidewall of the third conductive gate with hot H3PO4 aqueous solution.

    摘要翻译: 提供了一种用于混合模式IC形成具有不同间隔宽度的晶体管器件的方法。 该方法在晶片上提供三种不同种类的晶体管器件,其中两种晶体管器件具有不同宽度的其自己的间隔物,而其余的不具有间隔物。 该方法包括提供半导体衬底,该半导体衬底具有形成在其上的至少第一导电栅极,第二导电栅极和第三导电栅极,并且在第一导电栅极,第二导电栅极和第三导电栅极上形成第一氧化物层。 然后,执行第一蚀刻操作以沿着第一导电栅极,第二导电栅极和第三导电栅极的每个侧壁形成氧化物间隔物。 然后在第一导电栅极上形成第一掩模,然后沿着第二导电栅极和第三导电栅极的每个侧壁形成间隔物。 之后,去除第一导电栅极上的第一掩模。 随后,形成与第一导电栅极,第二导电栅极和第三导电栅极之上的第一氧化物层的厚度不同的氮化硅层。 然后,执行第二蚀刻操作以在第二导电栅极和第三导电栅极的每个侧壁上形成氮化硅的间隔物。 此后,在第一导电栅极,第二导电栅极和第三导电栅极上形成第二共形氧化物层。 随后,在形成在第二导电栅极上的第二氧化物层上形成第二掩模,同时将第二共形氧化物层暴露在第一导电栅极和第三导电栅极上。 除去第二氧化物层,然后除去第二掩模。 最后,用热的H 3 PO 4水溶液沿着第三导电栅极的每个侧壁除去氮化硅的间隔物。

    Method of fabricating a load resistor for an SRAM
    9.
    发明授权
    Method of fabricating a load resistor for an SRAM 失效
    制造SRAM负载电阻的方法

    公开(公告)号:US06245627B1

    公开(公告)日:2001-06-12

    申请号:US09251007

    申请日:1999-02-16

    IPC分类号: H01L218244

    CPC分类号: H01L28/20 H01L27/11

    摘要: A method of fabricating a load resistor for an SRAM. A substrate has a polysilicon layer formed thereon through a buried contact process. An inter-layer dielectric layer is formed over the substrate and then patterned to form an opening that exposes the polysilicon layer. A poly via is then formed in the opening to serve as a load resistor. The inter-layer dielectric layer is patterned to form a contact window, which is then filled with a conductive layer to form a contact.

    摘要翻译: 一种制造SRAM负载电阻的方法。 衬底通过掩埋接触工艺形成在其上的多晶硅层。 层间电介质层形成在衬底上,然后被图案化以形成露出多晶硅层的开口。 然后在开口中形成多孔以用作负载电阻器。 图案化层间电介质层以形成接触窗口,然后用导电层填充以形成接触。

    Method of fabricating metal interconnect
    10.
    发明授权
    Method of fabricating metal interconnect 有权
    制造金属互连的方法

    公开(公告)号:US06207556B1

    公开(公告)日:2001-03-27

    申请号:US09350968

    申请日:1999-07-09

    申请人: Shih-Ying Hsu

    发明人: Shih-Ying Hsu

    IPC分类号: H01L2102

    摘要: A method for fabricating a metal interconnect involves forming a first dielectric layer on the substrate having metal lines formed thereon, wherein the top surface of the first dielectric layer is lower than that of the metal line. As a result, the top surface and a part of the sidewall of the metal line are exposed. A spacer is then formed on the exposed sidewall of the metal line. A second dielectric layer is formed on the substrate, wherein the spacer has different etching selectivity from the second dielectric layer. With the spacer serving as an etching stop layer, a via opening is formed in the second dielectric layer, while the via opening is filled with a metal plug to form a via plug.

    摘要翻译: 一种用于制造金属互连的方法包括在其上形成有金属线的基板上形成第一电介质层,其中第一电介质层的顶表面低于金属线的顶表面。 结果,金属线的顶表面和侧壁的一部分被暴露。 然后在金属线的暴露的侧壁上形成间隔物。 在基板上形成第二介质层,其中间隔物具有与第二介电层不同的蚀刻选择性。 通过间隔件作为蚀刻停止层,在第二电介质层中形成通路开口,同时通孔开口填充有金属塞以形成通孔塞。