公开(公告)号：US20190101905A1

公开(公告)日：2019-04-04

申请号：US15719680

申请日：2017-09-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hongxin Zhang ,  Shaowen Gao ,  Norman Chen

IPC: G05B19/418

CPC classification number: G05B19/41845 ,  G05B2219/36089 ,  G05B2219/45031

Abstract: Methods according to the disclosure include: converting an image of a manufactured circuit to a plurality of representative contours, the plurality of representative contours corresponding to printed features in the manufactured circuit; generating a risk inventory for the manufactured circuit based on the plurality of representative contours, the risk inventory being configured to identify at least one process sensitive geometry (PSG) in the manufactured circuit; generating a common process window (CPW) for the manufactured circuit based on the plurality of representative contours and the risk inventory, the CPW being indicative of manufacturing reliability of each feature in the manufactured circuit; and generating instructions to adjust a manufacturing tool for creating the manufactured circuit, based on the generated CPW.

公开(公告)号：US09484300B2

公开(公告)日：2016-11-01

申请号：US14953864

申请日：2015-11-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sonia Ghosh ,  Randy Mann ,  Norman Chen ,  Shaowen Gao

IPC: H01L21/00 ,  H01L23/528 ,  H01L21/66 ,  G06F17/50 ,  H01L21/3213 ,  H01L23/522 ,  H01L27/11 ,  H01L27/02

CPC classification number: H01L23/528 ,  G06F17/5068 ,  H01L21/32139 ,  H01L22/12 ,  H01L23/5226 ,  H01L27/0207 ,  H01L27/1116 ,  H01L2924/0002 ,  Y02T10/82 ,  H01L2924/00

Abstract: Methods for forming a semiconductor layer, such as a metal1 layer, having minimum width features separated by a distance greater than a minimum pitch, and the resulting devices are disclosed. Embodiments may include determining a first shape and a second shape having a minimum width within a semiconductor layer, wherein a distance between the first shape and the second shape is greater than a minimum pitch, determining an intervening shape between the first shape and the second shape, and designating a dummy shape within the intervening shape, wherein the dummy shape is at the minimum pitch from the first shape.

Abstract translation: 公开了形成半导体层的方法，例如金属层，其具有最小宽度特征被隔开大于最小间距的距离，以及所得到的器件。 实施例可以包括确定在半导体层内具有最小宽度的第一形状和第二形状，其中第一形状和第二形状之间的距离大于最小间距，确定第一形状和第二形状之间的中间形状 并且在所述中间形状中指定虚拟形状，其中所述虚拟形状距所述第一形状处于最小间距。

公开(公告)号：US10401837B2

公开(公告)日：2019-09-03

申请号：US15719680

申请日：2017-09-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hongxin Zhang ,  Shaowen Gao ,  Norman Chen

IPC: G05B19/418 ,  G06F17/50

Abstract: A method disclosed herein includes: converting an image of a manufactured circuit to a plurality of representative contours, the plurality of representative contours corresponding to printed features in the manufactured circuit; generating a risk inventory for the manufactured circuit based on the plurality of representative contours, the risk inventory being configured to identify at least one process sensitive geometry (PSG) in the manufactured circuit; generating a common process window (CPW) for the manufactured circuit based on the plurality of representative contours and the risk inventory, the CPW being indicative of manufacturing reliability of each feature in the manufactured circuit; and generating instructions to adjust a manufacturing tool for creating the manufactured circuit, based on the generated CPW.

公开(公告)号：US10386715B2

公开(公告)日：2019-08-20

申请号：US15730830

申请日：2017-10-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Feng Wang ,  Hongxin Zhang ,  Shaowen Gao ,  Norman Chen

IPC: G03F1/36

Abstract: A method of creating an optical proximity correction (OPC) model and assessing the model through optical rule checking (ORC) includes the introduction of post-integration, i.e., post-metallization data. High density critical dimension scanning electron microscopy and backscattered electron scanning electron microscopy from a metallized structure are used during development and verification of the model to accurately predict post-integration behavior.

公开(公告)号：US09263349B2

公开(公告)日：2016-02-16

申请号：US14074981

申请日：2013-11-08

Applicant: GLOBALFOUNDRIES inc.

Inventor： Sonia Ghosh ,  Randy Mann ,  Norman Chen ,  Shaowen Gao

IPC: G03C5/00 ,  H01L21/66 ,  G06F17/50 ,  H01L21/3213 ,  H01L27/02

CPC classification number: H01L23/528 ,  G06F17/5068 ,  H01L21/32139 ,  H01L22/12 ,  H01L23/5226 ,  H01L27/0207 ,  H01L27/1116 ,  H01L2924/0002 ,  Y02T10/82 ,  H01L2924/00

Abstract: Methods for forming a semiconductor layer, such as a metal1 layer, having minimum width features separated by a distance greater than a minimum pitch, and the resulting devices are disclosed. Embodiments may include determining a first shape and a second shape having a minimum width within a semiconductor layer, wherein a distance between the first shape and the second shape is greater than a minimum pitch, determining an intervening shape between the first shape and the second shape, and designating a dummy shape within the intervening shape, wherein the dummy shape is at the minimum pitch from the first shape.

Abstract translation: 公开了形成半导体层的方法，例如金属层，其具有最小宽度特征被隔开大于最小间距的距离，以及所得到的器件。 实施例可以包括确定在半导体层内具有最小宽度的第一形状和第二形状，其中第一形状和第二形状之间的距离大于最小间距，确定第一形状和第二形状之间的中间形状 并且在所述中间形状中指定虚拟形状，其中所述虚拟形状距所述第一形状处于最小间距。