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    METHODS AND STRUCTURES FOR A GATE CUT
    2.
    发明申请
    METHODS AND STRUCTURES FOR A GATE CUT 审中-公开

    公开(公告)号：US20190259668A1

    公开(公告)日：2019-08-22

    申请号：US15899986

    申请日：2018-02-20

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Chang Seo Park ,  Haiting Wang ,  Shimpei Yamaguchi ,  Junsic Hong ,  Yong Mo Yang ,  Scott Beasor

    IPC: H01L21/8234 ,  H01L27/088

    Abstract: Structures and fabrication methods for a field-effect transistor. First and second spacers are formed adjacent to opposite sidewalls of a gate structure. A section of the gate structure is partially removed with a first etching process to form a cut that extends partially through the gate structure. After partially removing the section of the gate structure with the first etching process, upper sections of the first and second sidewall spacers arranged above the gate structure inside the cut are at least partially removed. After at least partially removing the upper sections of the first and second sidewall spacers, the section of the gate structure is completely removed from the cut with a second etching process. A dielectric material is deposited inside the cut to form a dielectric pillar.

    METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON TRANSISTOR DEVICES
    3.
    发明申请
    METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON TRANSISTOR DEVICES 审中-公开

    公开(公告)号：US20190131429A1

    公开(公告)日：2019-05-02

    申请号：US15797837

    申请日：2017-10-30

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Jiehui Shu ,  Chang Seo Park ,  Shimpei Yamaguchi ,  Tao Han ,  Yong Mo Yang ,  Jinping Liu ,  Hyuck Soo Yang

    IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234

    Abstract: One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor substrate, the sacrificial gate structure comprising a sacrificial gate insulation layer and a sacrificial gate electrode material, performing a first gate-cut etching process to thereby form an opening in the sacrificial gate electrode material and forming an internal sidewall spacer in the opening. In this example, the method also includes, after forming the internal sidewall spacer, performing a second gate-cut etching process through the opening, the second gate-cut etching process being adapted to remove the sacrificial gate electrode material, performing an oxidizing anneal process and forming an insulating material in at least the opening.

    FORMING INTERCONNECT WITHOUT GATE CUT ISOLATION BLOCKING OPENING FORMATION
    6.
    发明申请
    FORMING INTERCONNECT WITHOUT GATE CUT ISOLATION BLOCKING OPENING FORMATION 有权

    公开(公告)号：US20210028067A1

    公开(公告)日：2021-01-28

    申请号：US16517827

    申请日：2019-07-22

    Applicant: GLOBALFOUNDRIES INC.

    Inventor： Daniel J. Jaeger ,  Naved A. Siddiqui ,  Shimpei Yamaguchi ,  Shreesh Narasimha

    IPC: H01L21/8234 ,  H01L21/768 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

    Abstract: A method includes forming a gate cut opening by removing a sacrificial material from a portion of a dummy gate in a first dielectric over a substrate. The gate cut opening includes a lower portion in which the sacrificial material was located and an upper portion extending laterally over the first dielectric. Filling the gate cut opening with a second dielectric creates a gate cut isolation. Recessing the second dielectric creates a cap opening in the second dielectric; and filling the cap opening with a third dielectric creates a dielectric cap. The third dielectric is different than the second dielectric, e.g., oxide versus nitride, allowing forming of an interconnect in at least a portion of the third dielectric without the second, harder dielectric acting as an etch stop.

    Methods and structures for a gate cut
    7.
    发明授权
    Methods and structures for a gate cut 有权

    公开(公告)号：US10832966B2

    公开(公告)日：2020-11-10

    申请号：US15899986

    申请日：2018-02-20

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Chang Seo Park ,  Haiting Wang ,  Shimpei Yamaguchi ,  Junsic Hong ,  Yong Mo Yang ,  Scott Beasor

    IPC: H01L27/115 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

    Abstract: Structures and fabrication methods for a field-effect transistor. First and second spacers are formed adjacent to opposite sidewalls of a gate structure. A section of the gate structure is partially removed with a first etching process to form a cut that extends partially through the gate structure. After partially removing the section of the gate structure with the first etching process, upper sections of the first and second sidewall spacers arranged above the gate structure inside the cut are at least partially removed. After at least partially removing the upper sections of the first and second sidewall spacers, the section of the gate structure is completely removed from the cut with a second etching process. A dielectric material is deposited inside the cut to form a dielectric pillar.

    Methods of forming replacement gate structures on transistor devices
    8.
    发明授权
    Methods of forming replacement gate structures on transistor devices 有权

    公开(公告)号：US10453936B2

    公开(公告)日：2019-10-22

    申请号：US15797837

    申请日：2017-10-30

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Jiehui Shu ,  Chang Seo Park ,  Shimpei Yamaguchi ,  Tao Han ,  Yong Mo Yang ,  Jinping Liu ,  Hyuck Soo Yang

    IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088

    Abstract: One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor substrate, the sacrificial gate structure comprising a sacrificial gate insulation layer and a sacrificial gate electrode material, performing a first gate-cut etching process to thereby form an opening in the sacrificial gate electrode material and forming an internal sidewall spacer in the opening. In this example, the method also includes, after forming the internal sidewall spacer, performing a second gate-cut etching process through the opening, the second gate-cut etching process being adapted to remove the sacrificial gate electrode material, performing an oxidizing anneal process and forming an insulating material in at least the opening.

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