公开(公告)号：US09564521B2

公开(公告)日：2017-02-07

申请号：US15076850

申请日：2016-03-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Till Schloesser ,  Peter Baars

IPC: H01L21/336 ,  H01L21/44 ,  H01L29/66 ,  H01L21/28 ,  H01L29/51 ,  H01L27/115 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L29/6684 ,  H01L21/28291 ,  H01L21/823462 ,  H01L27/11509 ,  H01L29/516 ,  H01L29/78391

Abstract: A semiconductor device comprises a first and second circuit element. The first circuit element comprises a first electrode structure including a first high-k dielectric layer, the first high-k dielectric layer having a first thickness and comprising hafnium. The second circuit element comprises a second electrode structure that includes a second high-k dielectric layer having a ferroelectric behavior, wherein the second high-k dielectric layer has a second thickness and comprises hafnium, and wherein the second thickness is greater than the first thickness.

Abstract translation: 半导体器件包括第一和第二电路元件。 第一电路元件包括包括第一高k电介质层的第一电极结构，第一高k电介质层具有第一厚度并且包含铪。 第二电路元件包括第二电极结构，其包括具有铁电性能的第二高k电介质层，其中第二高k电介质层具有第二厚度并且包括铪，并且其中第二厚度大于第一厚度 。

公开(公告)号：US20130270619A1

公开(公告)日：2013-10-17

申请号：US13793645

申请日：2013-03-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Till Schloesser ,  Peter Baars

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/6684 ,  H01L21/28291 ,  H01L21/823462 ,  H01L27/11509 ,  H01L29/516 ,  H01L29/78391

Abstract: Ferroelectric circuit elements, such as field effect transistors or capacitors, may be formed on the basis of hafnium oxide, which may also be used during the fabrication of sophisticated high-k metal gate electrode structures of fast transistors. To this end, the hafnium-based oxide having appropriate thickness and material composition may be patterned at any appropriate manufacturing stage, without unduly affecting the overall process flow for fabricating a sophisticated high-k metal gate electrode structure.

Abstract translation: 可以在氧化铪的基础上形成诸如场效应晶体管或电容器的铁电电路元件，其也可以在制造快速晶体管的复杂高k金属栅电极结构期间使用。 为此，可以在任何合适的制造阶段对具有适当厚度和材料组成的铪基氧化物进行图案化，而不会不利地影响用于制造复杂的高k金属栅电极结构的整个工艺流程。

公开(公告)号：US09349842B2

公开(公告)日：2016-05-24

申请号：US13793645

申请日：2013-03-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Till Schloesser ,  Peter Baars

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/51 ,  H01L27/115 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L29/6684 ,  H01L21/28291 ,  H01L21/823462 ,  H01L27/11509 ,  H01L29/516 ,  H01L29/78391

Abstract: Ferroelectric circuit elements, such as field effect transistors or capacitors, may be formed on the basis of hafnium oxide, which may also be used during the fabrication of sophisticated high-k metal gate electrode structures of fast transistors. To this end, the hafnium-based oxide having appropriate thickness and material composition may be patterned at any appropriate manufacturing stage, without unduly affecting the overall process flow for fabricating a sophisticated high-k metal gate electrode structure.

Abstract translation: 可以在氧化铪的基础上形成诸如场效应晶体管或电容器的铁电电路元件，其也可以在制造快速晶体管的复杂高k金属栅电极结构期间使用。 为此，可以在任何合适的制造阶段对具有适当厚度和材料组成的铪基氧化物进行图案化，而不会不利地影响用于制造复杂的高k金属栅电极结构的整个工艺流程。

公开(公告)号：US20140203339A1

公开(公告)日：2014-07-24

申请号：US14226176

申请日：2014-03-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Till Schloesser ,  Peter Baars ,  Frank Jakubowski

IPC: H01L29/78

CPC classification number: H01L29/78 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: A semiconductor device includes a high-k metal gate electrode structure that is positioned above an active region, has a top surface that is positioned at a gate height level, and includes a high-k dielectric material and an electrode metal. Raised drain and source regions are positioned laterally adjacent to the high-k metal gate electrode structure and connect to the active region, and a top surface of each of the raised drain and source regions is positioned at a contact height level that is below the gate height level. An etch stop layer is positioned above the top surface of the raised drain and source regions and a contact element connects to one of the raised drain and source regions, the contact element extending through the etch stop layer and a dielectric material positioned above the high-k metal gate electrode structure and the raised drain and source regions.

Abstract translation: 半导体器件包括位于有源区上方的高k金属栅电极结构，具有位于栅极高度的顶表面，并且包括高k电介质材料和电极金属。 引出的漏极和源极区域横向邻近高k金属栅极电极结构定位并连接到有源区域，并且每个升高的漏极和源极区域的顶表面位于栅极下方的接触高度水平处 身高。 蚀刻停止层位于凸起的漏极和源极区域的顶表面上方，并且接触元件连接到凸起的漏极和源极区域之一，接触元件延伸穿过蚀刻停止层， k金属栅极电极结构和升高的漏极和源极区域。

公开(公告)号：US20160204219A1

公开(公告)日：2016-07-14

申请号：US15076850

申请日：2016-03-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Till Schloesser ,  Peter Baars

IPC: H01L29/51 ,  H01L29/78

CPC classification number: H01L29/6684 ,  H01L21/28291 ,  H01L21/823462 ,  H01L27/11509 ,  H01L29/516 ,  H01L29/78391

Abstract: A semiconductor device comprises a first and second circuit element. The first circuit element comprises a first electrode structure including a first high-k dielectric layer, the first high-k dielectric layer having a first thickness and comprising hafnium. The second circuit element comprises a second electrode structure that includes a second high-k dielectric layer having a ferroelectric behavior, wherein the second high-k dielectric layer has a second thickness and comprises hafnium, and wherein the second thickness is greater than the first thickness.

Abstract translation: 半导体器件包括第一和第二电路元件。 第一电路元件包括包括第一高k电介质层的第一电极结构，第一高k电介质层具有第一厚度并且包含铪。 第二电路元件包括第二电极结构，其包括具有铁电性能的第二高k电介质层，其中第二高k电介质层具有第二厚度并且包括铪，并且其中第二厚度大于第一厚度 。

公开(公告)号：US09324854B2

公开(公告)日：2016-04-26

申请号：US14226176

申请日：2014-03-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Till Schloesser ,  Peter Baars ,  Frank Jakubowski

IPC: H01L29/772 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/66 ,  H01L21/285 ,  H01L21/288 ,  H01L21/768

CPC classification number: H01L29/78 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: A semiconductor device includes a high-k metal gate electrode structure that is positioned above an active region, has a top surface that is positioned at a gate height level, and includes a high-k dielectric material and an electrode metal. Raised drain and source regions are positioned laterally adjacent to the high-k metal gate electrode structure and connect to the active region, and a top surface of each of the raised drain and source regions is positioned at a contact height level that is below the gate height level. An etch stop layer is positioned above the top surface of the raised drain and source regions and a contact element connects to one of the raised drain and source regions, the contact element extending through the etch stop layer and a dielectric material positioned above the high-k metal gate electrode structure and the raised drain and source regions.

Abstract translation: 半导体器件包括位于有源区上方的高k金属栅电极结构，具有位于栅极高度的顶表面，并且包括高k电介质材料和电极金属。 引出的漏极和源极区域横向邻近高k金属栅极电极结构定位并连接到有源区域，并且每个升高的漏极和源极区域的顶表面位于栅极下方的接触高度水平处 身高。 蚀刻停止层位于凸起的漏极和源极区域的顶表面上方，并且接触元件连接到凸起的漏极和源极区域之一，接触元件延伸穿过蚀刻停止层， k金属栅极电极结构和升高的漏极和源极区域。