公开(公告)号：US09105345B2

公开(公告)日：2015-08-11

申请号：US14242000

申请日：2012-08-31

申请人： Tae Won Noh ,  Daesu Lee ,  Jong-Gul Yoon

发明人： Tae Won Noh ,  Daesu Lee ,  Jong-Gul Yoon

IPC分类号： G11C11/22 ,  H01L27/115 ,  H01L49/02 ,  H01L27/22

CPC分类号： G11C11/221 ,  G11C11/22 ,  G11C11/2275 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L27/228 ,  H01L28/55

摘要： The present invention relates to a ferroelectric memory device having a multilevel polarization (MLP) state generated due to adjustment of a displacement current and to a method for manufacturing the ferroelectric memory device.

摘要翻译： 本发明涉及由于调整位移电流而产生的多电平极化（MLP）状态的铁电存储器件以及制造该铁电存储器件的方法。

公开(公告)号：US20150200197A1

公开(公告)日：2015-07-16

申请号：US14579394

申请日：2014-12-22

申请人： FUJITSU SEMICONDUCTOR LIMITED

发明人： Hitoshi Saito

IPC分类号： H01L27/115 ,  H01L27/108 ,  H01L49/02

CPC分类号： H01L27/11502 ,  H01L27/0805 ,  H01L27/108 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/56 ,  H01L28/60

摘要： An embodiment of a compound semiconductor device includes: a first lower electrode; a first insulating film over the first lower electrode; a first upper electrode over the first insulating film; a second lower electrode separate from the first lower electrode; a second insulating film over the second lower electrode; a third insulating film over the second insulating film; and a second upper electrode over on the third insulating film. A thickness of the first insulating film is substantially the same as a thickness of the third insulating film, a contour of the third insulating film in planar view is outside a contour of the second insulating film in planar view, and a contour of the second upper electrode in planar view is inside the contour of the second insulating film in planar view.

摘要翻译： 化合物半导体器件的实施例包括：第一下电极; 第一下电极上的第一绝缘膜; 在所述第一绝缘膜上方的第一上电极; 与第一下电极分离的第二下电极; 在所述第二下电极上的第二绝缘膜; 第二绝缘膜上的第三绝缘膜; 以及位于第三绝缘膜上的第二上电极。 第一绝缘膜的厚度与第三绝缘膜的厚度基本相同，平面图中的第三绝缘膜的轮廓在平面图中位于第二绝缘膜的轮廓之外，第二上部的轮廓 平面图中的电极在平面图中位于第二绝缘膜的轮廓内。

公开(公告)号：US08901704B2

公开(公告)日：2014-12-02

申请号：US11785866

申请日：2007-04-20

申请人： Hee Bok Kang

发明人： Hee Bok Kang

IPC分类号： H01L21/02 ,  H01L27/115 ,  H01L27/105

CPC分类号： G06K19/073 ,  G06K19/0723 ,  G11C11/22 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509

摘要： An integrated circuit and a manufacturing method thereof are provided. A chip size can be reduced by forming a memory device in which a ferroelectric capacitor region is laminated on a DRAM. The integrated circuit includes a cell array region having a capacitor, a peripheral circuit region, and a ferroelectric capacitor region being formed on an upper layer of the cell array region and the peripheral circuit region, and having a ferroelectric capacitor device.

摘要翻译： 提供了一种集成电路及其制造方法。 可以通过形成其中在DRAM上层叠铁电电容器区域的存储器件来减小芯片尺寸。 集成电路包括具有电容器，外围电路区域和形成在电池阵列区域和外围电路区域的上层上的铁电电容器区域的单元阵列区域，并且具有铁电电容器装置。

公开(公告)号：US08582343B2

公开(公告)日：2013-11-12

申请号：US12503357

申请日：2009-07-15

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： G11C11/22

CPC分类号： H01L23/564 ,  H01L21/76826 ,  H01L21/76832 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/19041 ,  H01L2924/19043

摘要： A ferroelectric capacitor comprising a transistor layer superimposed on a semiconductor substrate, a ferroelectric capacitor layer provided superior to the transistor layer, a wiring layer provided superior to the ferroelectric capacitor layer, and a passivation film. Further, at least one layer of barrier film capable of inhibiting penetration of moisture and hydrogen into the underlayer is provided between the ferroelectric capacitor layer and the passivation film, and the passivation film is characterized by containing a novolac resin.

摘要翻译： 包括叠加在半导体衬底上的晶体管层，设置在晶体管层之上的铁电电容器层，设置在铁电电容器层上方的布线层和钝化膜的铁电电容器。 此外，在铁电电容器层和钝化膜之间设置至少一层能够抑制水分和氢气渗透到底层中的阻挡膜，并且钝化膜的特征在于含有酚醛清漆树脂。

公开(公告)号：US08497181B1

公开(公告)日：2013-07-30

申请号：US13716177

申请日：2012-12-16

申请人： Fujitsu Semiconductor Limited

发明人： Wensheng Wang

IPC分类号： H01L21/02

CPC分类号： H01L28/65 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/56

摘要： An FeRAM is produced by a method including the steps of forming a lower electrode layer, forming a first ferroelectric film on the lower electrode layer, forming on the first ferroelectric film a second ferroelectric film in an amorphous state containing iridium inside, thermally treating the second ferroelectric film in an oxidizing atmosphere to crystallize the second ferroelectric film and to cause iridium in the second ferroelectric film to diffuse into the first ferroelectric film, forming an upper electrode layer on the second ferroelectric film, and processing each of the upper electrode layer, the second ferroelectric film, the first ferroelectric film, and the lower electrode layer to form the capacitor structure. With such a structure, the inversion charge amount in a ferroelectric capacitor structure is improved without increasing the leak current pointlessly, and a high yield can be assured, thereby realizing a highly reliable FeRAM.

摘要翻译： 通过以下方法制造FeRAM，该方法包括：形成下电极层，在下电极层上形成第一铁电体膜，在第一强电介质膜上形成含有铱的非晶状态的第二铁电体膜，热处理第二铁电体膜 强电介质膜在氧化气氛中使第二铁电体膜结晶化，使第二铁电体膜中的铱扩散到第一铁电体膜上，在第二铁电体膜上形成上部电极层，并对上部电极层， 第二铁电体膜，第一铁电体膜和下电极层，形成电容器结构。 通过这样的结构，能够提高铁电电容器结构的反转电荷量，而不会无意地增加泄漏电流，可以确保高产率，从而实现高可靠性的FeRAM。

公开(公告)号：US20130178038A1

公开(公告)日：2013-07-11

申请号：US13716177

申请日：2012-12-16

申请人： FUJITSU SEMICONDUCTOR LIMITED

发明人： Wensheng WANG

IPC分类号： H01L49/02

CPC分类号： H01L28/65 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/56

摘要： An FeRAM is produced by a method including the steps of forming a lower electrode layer, forming a first ferroelectric film on the lower electrode layer, forming on the first ferroelectric film a second ferroelectric film in an amorphous state containing iridium inside, thermally treating the second ferroelectric film in an oxidizing atmosphere to crystallize the second ferroelectric film and to cause iridium in the second ferroelectric film to diffuse into the first ferroelectric film, forming an upper electrode layer on the second ferroelectric film, and processing each of the upper electrode layer, the second ferroelectric film, the first ferroelectric film, and the lower electrode layer to form the capacitor structure. With such a structure, the inversion charge amount in a ferroelectric capacitor structure is improved without increasing the leak current pointlessly, and a high yield can be assured, thereby realizing a highly reliable FeRAM.

摘要翻译： 通过以下方法制造FeRAM，该方法包括：形成下电极层，在下电极层上形成第一铁电体膜，在第一强电介质膜上形成含有铱的非晶状态的第二铁电体膜，热处理第二铁电体膜 强电介质膜在氧化气氛中使第二铁电体膜结晶化，使第二铁电体膜中的铱扩散到第一铁电体膜上，在第二铁电体膜上形成上部电极层，并对上部电极层， 第二铁电体膜，第一铁电体膜和下电极层，形成电容器结构。 通过这样的结构，能够提高铁电电容器结构的反转电荷量，而不会无意地增加泄漏电流，可以确保高产率，从而实现高可靠性的FeRAM。

公开(公告)号：US20130168813A1

公开(公告)日：2013-07-04

申请号：US13687715

申请日：2012-11-28

申请人： FUJITSU SEMICONDUCTOR LIMITED

发明人： Naoya Sashida

IPC分类号： H01L49/02

CPC分类号： H01L28/60 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76849 ,  H01L21/76856 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/0207 ,  H01L27/11509 ,  H01L28/55 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate; a first insulating film that is formed over the semiconductor substrate; a capacitor that is formed over the first insulating film and is formed by sequentially stacking a lower electrode, a capacitor dielectric film, and an upper electrode; a second insulating film that is formed over the capacitor and has a hole including the entire region of the upper electrode in plan view; and a conductor plug that is formed in the hole and contains tungsten.

摘要翻译： 半导体器件包括半导体衬底; 形成在半导体衬底上的第一绝缘膜; 形成在第一绝缘膜上并通过依次层叠下电极，电容器电介质膜和上电极而形成的电容器; 形成在所述电容器上并且在俯视图中具有包括所述上部电极的整个区域的孔的第二绝缘膜; 以及形成在孔中并包含钨的导体插塞。

公开(公告)号：US08367541B2

公开(公告)日：2013-02-05

申请号：US11189866

申请日：2005-07-27

申请人： Kouichi Nagai ,  Hitoshi Saito ,  Kaoru Sugawara ,  Makoto Takahashi ,  Masahito Kudo ,  Kazuhiro Asai ,  Yukimasa Miyazaki ,  Katsuhiro Sato ,  Kaoru Saigoh

发明人： Kouichi Nagai ,  Hitoshi Saito ,  Kaoru Sugawara ,  Makoto Takahashi ,  Masahito Kudo ,  Kazuhiro Asai ,  Yukimasa Miyazaki ,  Katsuhiro Sato ,  Kaoru Saigoh

IPC分类号： H01L21/4763

CPC分类号： H01L27/11507 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76843 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57 ,  H01L28/65 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/05042 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/45099 ,  H01L2224/05552

摘要： After a ferroelectric capacitor is formed, an Al wiring (conductive pad) connected to the ferroelectric capacitor is formed. Then, a silicon oxide film and a silicon nitride film are formed around the Al wiring. Thereafter, as a penetration inhibiting film which inhibits penetration of moisture into the silicon oxide film, an Al2O3 film is formed.

摘要翻译： 在形成铁电电容器之后，形成连接到铁电电容器的Al布线（导电焊盘）。 然后，在Al布线周围形成氧化硅膜和氮化硅膜。 此后，作为抑制水分渗透到氧化硅膜中的渗透抑制膜，形成Al 2 O 3膜。

公开(公告)号：US20120244642A1

公开(公告)日：2012-09-27

申请号：US13491737

申请日：2012-06-08

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L21/02

CPC分类号： H01L27/11509 ,  H01L23/53238 ,  H01L23/53295 ,  H01L24/05 ,  H01L27/0629 ,  H01L27/11502 ,  H01L28/55 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device including a semiconductor substrate having transistors formed thereon, a first interlayer insulating film formed above the semiconductor substrate and the transistors, a ferroelectric capacitor formed above the first interlayer insulating film, a second interlayer insulating film formed above the first interlayer insulating film and the ferroelectric capacitor, a first metal wiring formed on the second interlayer insulating film, and a protection film formed on an upper surface of the wiring but not on a side surface of the wiring.

摘要翻译： 一种制造半导体器件的方法，该半导体器件包括其上形成有晶体管的半导体衬底，形成在半导体衬底上的第一层间绝缘膜和晶体管，形成在第一层间绝缘膜上方的铁电电容器，形成在第一层间绝缘膜上的第二层间绝缘膜 层间绝缘膜和铁电电容器，形成在第二层间绝缘膜上的第一金属布线以及形成在布线的上表面而不是在布线的侧表面上的保护膜。

公开(公告)号：US20120171783A1

公开(公告)日：2012-07-05

申请号：US13412939

申请日：2012-03-06

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L21/02

CPC分类号： H01L27/11509 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： Provided is a ferroelectric memory including a silicon substrate, a transistor formed on the silicon substrate, and a ferroelectric capacitor formed above the transistor. The ferroelectric capacitor includes a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film, and a metal film formed on the upper electrode.

摘要翻译： 提供了一种铁电存储器，其包括硅衬底，形成在硅衬底上的晶体管和形成在晶体管上方的铁电电容器。 铁电电容器包括下电极，形成在下电极上的铁电膜，形成在强电介质膜上的上电极和形成在上电极上的金属膜。