公开(公告)号：US20230411384A1

公开(公告)日：2023-12-21

申请号：US17842266

申请日：2022-06-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anindya NATH ,  Robert J. GAUTHIER, JR. ,  Rajendran KRISHNASAMY

IPC: H01L27/02 ,  H01L49/02

CPC classification number: H01L27/0288 ,  H01L27/0259 ,  H01L28/20

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an electrostatic discharge device (ESD) with a pinch resistor and methods of manufacture. The structure includes: a semiconductor substrate; a shallow trench isolation structure extending into the semiconductor substrate; an amorphous layer in the semiconductor substrate and below the shallow trench isolation structure; and a pinch resistor between the shallow trench isolation structure and the amorphous layer.

公开(公告)号：US20210280699A1

公开(公告)日：2021-09-09

申请号：US16810076

申请日：2020-03-05

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anindya NATH ,  Alain F. LOISEAU

IPC: H01L29/74 ,  H01L29/04 ,  H01L29/73

Abstract: The present disclosure relates to a polysilicon-diode triggered compact silicon controlled rectifier. In particular, the present disclosure relates to a structure including a silicon controlled rectifier (SCR) which includes an n-well adjacent and in direct contact with a p-well, the SCR includes at least one shallow trench isolation (STI) region, and at least one polysilicon diode on top of the at least one STI region.

公开(公告)号：US20240347528A1

公开(公告)日：2024-10-17

申请号：US18300161

申请日：2023-04-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anindya NATH ,  Rajendran KRISHNASAMY ,  Souvick MITRA ,  Steven M. SHANK ,  Sagar P. KARALKAR

IPC: H01L27/02

CPC classification number: H01L27/0262

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to silicon control rectifiers and methods of manufacture. A structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and at least one gate structure in the first well which abuts one shallow trench isolation structure of the plurality of shallow trench isolation structures.

公开(公告)号：US20240096874A1

公开(公告)日：2024-03-21

申请号：US17945348

申请日：2022-09-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anindya NATH ,  Alain F. LOISEAU ,  Souvick MITRA

IPC: H01L27/02

CPC classification number: H01L27/0262

Abstract: The present disclosure relates to a structure including a trigger element within a semiconductor-on-insulator (SOI) substrate, and a silicon controlled rectifier (SCR) under a buried insulator layer of the SOI substrate. The trigger element is between an anode and a cathode of the SCR.

公开(公告)号：US20240339527A1

公开(公告)日：2024-10-10

申请号：US18296521

申请日：2023-04-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson R. HOLT ,  John J. PEKARIK ,  Anindya NATH ,  Souvick MITRA

IPC: H01L29/737 ,  H01L21/322

CPC classification number: H01L29/7371 ,  H01L21/322 ,  H01L29/747 ,  H01L29/78

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to low capacitance, low resistance devices and methods of manufacture. The structure includes: a semiconductor substrate; a device having an active region; and a porous semiconductor material within the semiconductor substrate and surrounding the active region of the device.

公开(公告)号：US20240304612A1

公开(公告)日：2024-09-12

申请号：US18118323

申请日：2023-03-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani PANDEY ,  Sagar Premnath KARALKAR ,  Rajendran KRISHNASAMY ,  Anindya NATH

IPC: H01L27/02

CPC classification number: H01L27/0262

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and a deep trench isolation structure between the plurality of shallow trench isolation structures and extending into the semiconductor material deeper than the plurality of shallow trench isolation structures.

公开(公告)号：US20230395591A1

公开(公告)日：2023-12-07

申请号：US17831545

申请日：2022-06-03

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anindya NATH ,  Souvick MITRA

IPC: H01L27/02 ,  H01L29/74 ,  H01L29/66

CPC classification number: H01L27/0262 ,  H01L29/7412 ,  H01L29/66371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertically stacked diode-trigger silicon controlled rectifiers and methods of manufacture. The structure includes: a silicon controlled rectifier in a trap rich region of a semiconductor substrate; and at least one diode built in polysilicon (gate material) and isolated by a gate-dielectric.

公开(公告)号：US20220254773A1

公开(公告)日：2022-08-11

申请号：US17170325

申请日：2021-02-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Zhiqing LI ,  William J. TAYLOR, JR. ,  Anindya NATH

IPC: H01L27/02

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge devices and methods of manufacture. The structure includes: a plurality of regions of a first dopant type; insulator material separating each region of the plurality of regions of the first dopant type; and a substrate contacting the plurality of regions of the first dopant type, the substrate comprising a base region of a second dopant type different than the first dopant type and an outer segment surrounding the plurality of regions of the first dopant type, the outer segment comprises an electrical resistivity higher than the second dopant type.