公开(公告)号：US10964599B2

公开(公告)日：2021-03-30

申请号：US16529162

申请日：2019-08-01

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC: H01L21/00 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

Abstract: Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US11349013B2

公开(公告)日：2022-05-31

申请号：US16549478

申请日：2019-08-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haigou Huang ,  Xusheng Wu ,  Jinsheng Gao

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8238

Abstract: One illustrative integrated circuit product disclosed herein includes a first final gate structure having a first end surface and a second final gate structure having a second end surface. In this embodiment, the integrated circuit product also includes an insulating gate separation structure positioned between the first and second final gate structures, wherein the first end surface contacts a first side surface of the insulating gate separation structure and the second end surface contacts a second side surface of the insulating gate separation structure. In this embodiment, the insulating gate separation structure has an inverted T-shaped cross-sectional configuration in at least one direction.

公开(公告)号：US11114542B2

公开(公告)日：2021-09-07

申请号：US16441726

申请日：2019-06-14

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Hui Zang ,  Haigou Huang

IPC: H01L29/66 ,  H01L29/51 ,  H01L29/78 ,  H01L29/49 ,  H01L21/762

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to semiconductor device with reduced gate height budget and methods of manufacture. The method includes: forming a plurality of gate structures on a substrate; recessing material of the plurality of gate structures to below a surface of an insulator material; forming trenches in the insulator material and underlying material adjacent to sidewalls of the plurality of gate structures; and filling the recesses and trenches with a capping material.

公开(公告)号：US11651992B2

公开(公告)日：2023-05-16

申请号：US17145555

申请日：2021-01-11

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haigou Huang ,  Yuping Ren ,  Paul Ackmann ,  Guoxiang Ning

IPC: H01L21/768 ,  H01L21/027 ,  H01L21/283 ,  H01L21/311

CPC classification number: H01L21/76808 ,  H01L21/0276 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76814 ,  H01L21/76816 ,  H01L21/76879

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gap fill void and connection structures and methods of manufacture. The structure includes: a gate structure comprising source and drain regions; a gate contact in direct contact and overlapping the gate structure; and source and drain contacts directly connecting to the source and drain regions, respectively.