公开(公告)号：US20210151443A1

公开(公告)日：2021-05-20

申请号：US16689330

申请日：2019-11-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Meixiong Zhao ,  Randy W. Mann ,  Sanjay Parihar ,  Anton Tokranov ,  Hong Yu ,  Hongliang Shen ,  Guoxiang Ning

IPC: H01L27/11 ,  H01L21/8239 ,  H01L21/8238

Abstract: Structures including static random access memory bit cells and methods of forming a structure including static random access memory bit cells. A first bit cell includes a first plurality of semiconductor fins, and a second bit cell includes a second plurality of semiconductor fins. A deep trench isolation region is laterally positioned between the first plurality of semiconductor fins of the first bit cell and the second plurality of semiconductor fins of the second bit cell.

公开(公告)号：US10957701B1

公开(公告)日：2021-03-23

申请号：US16679458

申请日：2019-11-11

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： HongLiang Shen ,  Meixiong Zhao ,  Guoxiang Ning

IPC: G11C17/00 ,  H01L27/112 ,  G11C17/18 ,  G11C17/16 ,  H01L23/528

Abstract: One IC product disclosed herein includes, among other things, a semiconductor substrate, a first anti-fuse device formed on the semiconductor substrate, the first anti-fuse device comprising at least one first fin formed with a first fin pitch, a first source region and a first drain region, wherein the first anti-fuse device is adapted to breakdown when a first programing voltage is applied to the first anti-fuse device, and a second anti-fuse device formed on the semiconductor substrate, the second anti-fuse device comprising at least one second fin formed with a second fin pitch, a second source region and a second drain region, wherein the second anti-fuse device is adapted to breakdown when a second programing voltage is applied to the second anti-fuse device, wherein the first fin pitch is greater than the second fin pitch and wherein the first programming voltage is greater than the second programing voltage.

公开(公告)号：US11037937B2

公开(公告)日：2021-06-15

申请号：US16689330

申请日：2019-11-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Meixiong Zhao ,  Randy W. Mann ,  Sanjay Parihar ,  Anton Tokranov ,  Hong Yu ,  Hongliang Shen ,  Guoxiang Ning

IPC: H01L27/11 ,  H01L21/8238 ,  H01L21/8239

Abstract: Structures including static random access memory bit cells and methods of forming a structure including static random access memory bit cells. A first bit cell includes a first plurality of semiconductor fins, and a second bit cell includes a second plurality of semiconductor fins. A deep trench isolation region is laterally positioned between the first plurality of semiconductor fins of the first bit cell and the second plurality of semiconductor fins of the second bit cell.

公开(公告)号：US11651992B2

公开(公告)日：2023-05-16

申请号：US17145555

申请日：2021-01-11

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haigou Huang ,  Yuping Ren ,  Paul Ackmann ,  Guoxiang Ning

IPC: H01L21/768 ,  H01L21/027 ,  H01L21/283 ,  H01L21/311

CPC classification number: H01L21/76808 ,  H01L21/0276 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76814 ,  H01L21/76816 ,  H01L21/76879

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gap fill void and connection structures and methods of manufacture. The structure includes: a gate structure comprising source and drain regions; a gate contact in direct contact and overlapping the gate structure; and source and drain contacts directly connecting to the source and drain regions, respectively.