公开(公告)号：US20190065408A1

公开(公告)日：2019-02-28

申请号：US15693149

申请日：2017-08-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Dejan S Milojicic ,  Chris I Dalton ,  Paolo Faraboschi ,  Kirk M. Bresniker

IPC: G06F12/14

Abstract: Example implementations relate to a capability enforcement processor. In an example, a capability enforcement processor may be interposed between a memory that stores data accessible via capabilities and a system processor that executes processes. The capability enforcement processor intercepts a memory request from the system processor and enforces the memory request based on capability enforcement processor capabilities maintained in per-process capability spaces of the capability enforcement processor.

公开(公告)号：US20170300349A1

公开(公告)日：2017-10-19

申请号：US15511933

申请日：2014-09-26

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Adrian Shaw ,  Chris I Dalton

IPC: G06F9/455 ,  H04L29/06

CPC classification number: G06F9/45558 ,  G06F9/45533 ,  G06F2009/45583 ,  G06F2009/45595 ,  H04L69/22

Abstract: Techniques for storing hypervisor messages in a network packet are described. In one aspect, a hypervisor of a computing device obtains a network packet generated by a virtual machine. The hypervisor may then identify available space within the network packet that can store data relating to a hypervisor message. The hypervisor may then store the hypervisor message in the available space within the network packet. The hypervisor may cause a physical network interface controller to transmit the network packet to a destination device through a network path that includes a message logging device.

公开(公告)号：US10884953B2

公开(公告)日：2021-01-05

申请号：US15693149

申请日：2017-08-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Dejan S Milojicic ,  Chris I Dalton ,  Paolo Faraboschi ,  Kirk M Bresniker

IPC: G06F12/14

Abstract: Example implementations relate to a capability enforcement processor. In an example, a capability enforcement processor may be interposed between a memory that stores data accessible via capabilities and a system processor that executes processes. The capability enforcement processor intercepts a memory request from the system processor and enforces the memory request based on capability enforcement processor capabilities maintained in per-process capability spaces of the capability enforcement processor.

公开(公告)号：US10929148B2

公开(公告)日：2021-02-23

申请号：US16307922

申请日：2016-06-08

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Nigel Edwards ,  Chris I Dalton

IPC: G06F9/455 ,  G06F9/4401 ,  G06F9/54 ,  G06F9/445 ,  G06F9/44 ,  G06F21/53 ,  G06F12/1009 ,  G06F21/55

Abstract: Example embodiments relate to executing services in containers. The examples disclosed herein include a computing device comprising instructions to load an inner portion of an operating system kernel in an inner region of a kernel space and an outer portion of the operating system kernel in an outer region of the kernel space. The example computing device may execute a service in a container in a user space. The container may be communicatively coupled with the outer region of the operating system kernel but divided from the inner portion of the operating system kernel.

公开(公告)号：US20190220287A1

公开(公告)日：2019-07-18

申请号：US16307922

申请日：2016-06-08

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Nigel Edwards ,  Chris I Dalton

IPC: G06F9/4401 ,  G06F9/54 ,  G06F12/1009 ,  G06F21/55

CPC classification number: G06F9/4406 ,  G06F9/44 ,  G06F9/445 ,  G06F9/45533 ,  G06F9/54 ,  G06F9/545 ,  G06F12/1009 ,  G06F21/53 ,  G06F21/554

Abstract: Example embodiments relate to executing services in containers. The examples disclosed herein include a computing device comprising instructions to load an inner portion of an operating system kernel in an inner region of a kernel space and an outer portion of the operating system kernel in an outer region of the kernel space. The example computing device may execute a service in a container in a user space. The container may be communicatively coupled with the outer region of the operating system kernel but divided from the inner portion of the operating system kernel.

公开(公告)号：US10324722B2

公开(公告)日：2019-06-18

申请号：US15192742

申请日：2016-06-24

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Dejan S Milojicic ,  Paolo Faraboschi ,  Chris I Dalton

IPC: G06F9/30 ,  G06F12/02 ,  G06F13/16

Abstract: Example implementations relate to global capabilities transferrable across node boundaries. For example, in an implementation, a switch that routes traffic between a node and global memory may receive an instruction from the node. The switch may recognize that data referenced by the instruction is a global capability, and the switch may process that global capability accordingly.

公开(公告)号：US10027481B2

公开(公告)日：2018-07-17

申请号：US14755125

申请日：2015-06-30

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Liqun Chen ,  Fraser John Dickin ,  Martin Sadler ,  Chris I Dalton ,  Nigel Edwards ,  Simon Kai-Ying Shiu ,  Boris Balacheff

IPC: H04L9/08 ,  G06F21/72 ,  H04L9/32 ,  H04L9/30

CPC classification number: H04L9/0897 ,  G06F21/72 ,  H04L9/0866 ,  H04L9/3073 ,  H04L9/3247

Abstract: An electronic device for management of cryptographic keys, and a corresponding method implemented in a computing device comprising a physical processor, transmit feature data of the device to a key generation module, wherein the feature data comprises information corresponding to an identifier or an attribute of the device, and receive, by the device from the key generation module, a digital signature of the transmitted feature data. The device installs the received digital signature as a cryptographic private key for communication, and performs a cryptographic operation using the installed digital signature as the cryptographic private key.

公开(公告)号：US20170371663A1

公开(公告)日：2017-12-28

申请号：US15192742

申请日：2016-06-24

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Dejan S Milojicic ,  Paolo Faraboschi ,  Chris I Dalton

IPC: G06F9/30 ,  G06F12/02 ,  G06F13/16

CPC classification number: G06F9/30145 ,  G06F12/0223 ,  G06F13/1668 ,  G06F2212/254

Abstract: Example implementations relate to global capabilities transferrable across node boundaries. For example, in an implementation, a switch that routes traffic between a node and global memory may receive an instruction from the node. The switch may recognize that data referenced by the instruction is a global capability, and the switch may process that global capability accordingly.