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    FABRIC-ATTACHED MEMORY FOR APPLICATIONS USING MESSAGE PASSING PROCEDURE
    2.
    发明公开
    FABRIC-ATTACHED MEMORY FOR APPLICATIONS USING MESSAGE PASSING PROCEDURE 审中-公开

    公开(公告)号：US20240362163A1

    公开(公告)日：2024-10-31

    申请号：US18308953

    申请日：2023-04-28

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Soumitra Chatterjee ,  Chinmay Ghosh ,  Mashood Abdulla Kodavanji ,  Sharad Singhal

    IPC: G06F12/02 ,  G06F13/16

    CPC classification number: G06F12/0284 ,  G06F13/16 ,  G06F2213/16

    Abstract: Some examples relate to providing a fabric-attached memory (FAM) for applications using message passing procedure. In an example, a remotely accessible memory creation function of a message passing procedure is modified to include a reference to a region of memory in a FAM. A remotely accessible memory data structure representing a remotely accessible memory is created through the remotely accessible memory creation function. When an application calls a message passing function of the message passing procedure, a determination is made whether the remotely accessible memory data structure in the message passing function includes a reference to the region of memory in the FAM. In response to a determination that the remotely accessible memory data structure includes a reference to the region of memory in the FAM, the message passing function call is routed to a FAM message passing function corresponding to the message passing function.

    Sparse matrix vector multiplication with a matrix vector multiplication unit
    3.
    发明授权
    Sparse matrix vector multiplication with a matrix vector multiplication unit 有权

    公开(公告)号：US10726096B2

    公开(公告)日：2020-07-28

    申请号：US16159578

    申请日：2018-10-12

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Soumitra Chatterjee ,  Chinmay Ghosh ,  Mashood Abdulla Kodavanji ,  Mohan Parthasarathy

    IPC: G06F17/16 ,  G06N3/04 ,  G06N3/08

    Abstract: Systems and methods are provided for sparse matrix vector multiplication with a matrix vector multiplication unit. The method includes partitioning a sparse matrix of entries into a plurality of sub-matrices; mapping each of the sub-matrices to one of a plurality of respective matrix vector multiplication engines; partitioning an input vector into a plurality of sub-vectors; computing, via each matrix vector multiplication engine, a plurality of intermediate result vectors each resulting from a multiplication of one of the sub-matrices and one of the sub-vectors; for each set of rows of the sparse matrix, adding elementwise the intermediate result vectors to produce a plurality of result sub-vectors; and concatenating the result sub-vectors to form a result vector.

    OPERATION EXECUTION ON MEMORY SERVERS
    6.
    发明申请
    OPERATION EXECUTION ON MEMORY SERVERS 有权

    公开(公告)号：US20250013386A1

    公开(公告)日：2025-01-09

    申请号：US18346406

    申请日：2023-07-03

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Sharad Singhal ,  Rishi Kesh K Rajak ,  Mashood Abdulla Kodavanji ,  Cynara Justine ,  Syed Ismail Faizan Barmawer

    IPC: G06F3/06

    Abstract: In some examples, a system includes a plurality of memory servers managing access of data in a memory. A computer node includes a plurality of buffers associated with the memory servers. A processor executes a plurality of functions accessible by the computer node to access the data of the memory servers, the plurality of functions including associating, with the plurality of buffers, information specifying a type of an operation to be performed on the data using the plurality of buffers, queueing the operation in the plurality of buffers, initiating an execution of the operation, based on the type specified by the information, at the memory servers associated with the plurality of buffers, and providing results of the operation from the memory servers to the computer node.

    COLLECTIVE OPERATION USING A NETWORK-ATTACHED MEMORY
    10.
    发明申请
    COLLECTIVE OPERATION USING A NETWORK-ATTACHED MEMORY 有权

    公开(公告)号：US20250021273A1

    公开(公告)日：2025-01-16

    申请号：US18349318

    申请日：2023-07-10

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Soumitra Chatterjee ,  Chinmay Ghosh ,  Mashood Abdulla Kodavanji ,  Sharad Singhal

    IPC: G06F3/06

    Abstract: In some examples, a processor receives a first request to allocate a memory region for a collective operation by process entities in a plurality of computer nodes. In response to the first request, the processor creates a virtual address for the memory region and allocates the memory region in a network-attached memory coupled to the plurality of computer nodes over a network. The processor correlates the virtual address to an address of the memory region in mapping information. The processor identifies the memory region in the network-attached memory by obtaining the address of the memory region from the mapping information using the virtual address in a second request. In response to the second request, the processor performs the collective operation.

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