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公开(公告)号：US10817178B2
公开(公告)日：2020-10-27
申请号：US15032327
申请日：2013-10-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jichuan Chang , Sheng Li , Parthasarathy Ranganathan
IPC: G06F3/06
Abstract: A method for compressing and compacting memory on a memory device is described. The method includes organizing a number of compressed memory pages referenced in a number of compaction table entries based on a size of the number of compressed memory pages and compressing the number of compaction table entries, in which a compaction table entry comprise a number of fields.
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公开(公告)号：US20160275014A1
公开(公告)日：2016-09-22
申请号：US15032329
申请日：2013-10-31
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Kevin T. Lim , Sheng Li , Parthasarathy Ranganathan , William C. Hallowell
Abstract: According to an example, a processor generates a memory access request and sends the memory access request to a memory module. The processor receives data from the memory module in response to the memory access request when a memory device in the memory module for the memory access request is busy and unable to execute the memory access request.
Abstract translation: 根据示例，处理器生成存储器访问请求并将存储器访问请求发送到存储器模块。 当用于存储器访问请求的存储器模块中的存储器设备忙并且不能执行存储器访问请求时，处理器响应于存储器访问请求从存储器模块接收数据。
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公开(公告)号：US10691344B2
公开(公告)日：2020-06-23
申请号：US14785120
申请日：2013-05-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Doe Hyun Yoon , Sheng Li , Jichuan Chang , Ke Chen , Parthasarathy Ranganathan , Norman Paul Jouppi
Abstract: A first memory controller receives an access command from a second memory controller, where the access command is timing non-deterministic with respect to a timing specification of a memory. The first memory controller sends at least one access command signal corresponding to the access command to the memory, wherein the at least one access command signal complies with the timing specification. The first memory controller determines a latency of access of the memory. The first memory controller sends feedback information relating to the latency to the second memory controller.
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公开(公告)号：US20180307420A1
公开(公告)日：2018-10-25
申请号：US16011187
申请日：2018-06-18
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Doe Hyun Yoon , Naveen Muralimanohar , Jichuan Chang , Parthasarathy Ranganathan
CPC classification number: G06F3/0619 , G06F3/065 , G06F3/0655 , G06F3/0656 , G06F3/0665 , G06F3/0688 , G06F3/0689 , G06F11/108 , G06F2211/1054 , G06F2211/1066
Abstract: An example method involves receiving, at a first memory node, data to be written at a memory location in the first memory node. The data is received from a device. At the first memory node, old data is read from the memory location, without sending the old data to the device. The data is written to the memory location. The data and the old data are sent from the first memory node to a second memory node to store parity information in the second memory node without the device determining the parity information. The parity information is based on the data stored in the first memory node.
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公开(公告)号：US10019176B2
公开(公告)日：2018-07-10
申请号：US14417220
申请日：2012-10-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Doe Hyun Yoon , Naveen Muralimanohar , Jichuan Chang , Parthasarathy Ranganathan
CPC classification number: G06F3/0619 , G06F3/065 , G06F3/0655 , G06F3/0656 , G06F3/0665 , G06F3/0688 , G06F3/0689 , G06F11/108 , G06F2211/1054 , G06F2211/1066
Abstract: An example method involves receiving, at a first memory node, data to be written at a memory location in the first memory node. The data is received from a device. At the first memory node, old data is read from the memory location, without sending the old data to the device. The data is written to the memory location. The data and the old data are sent from the first memory node to a second memory node to store parity information in the second memory node without the device determining the parity information. The parity information is based on the data stored in the first memory node.
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Patent Agency Ranking
公开(公告)号：US20160342351A1
公开(公告)日：2016-11-24
申请号：US15113824
申请日：2014-01-23
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Sheng Li , Jishen Zhao , Jichuan Chang , Parthasarathy Ranganathan , Alistair Veitch , Kevin T. Lim , Mark Lillibridge
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F11/1471 , G06F11/1474 , G06F2201/805 , G11B27/36
Abstract: A technique includes acquiring a plurality of write requests from at least one memory controller and logging information associated with the plurality of write requests in persistent storage. The technique includes applying the plurality of write requests atomically as a group to persistent storage.
Abstract translation: 一种技术包括从至少一个存储器控制器获取多个写入请求，并在永久存储器中记录与多个写入请求相关联的信息。 该技术包括将多个写请求作为一组原子地应用于持久存储。
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公开(公告)号：US20160267015A1
公开(公告)日：2016-09-15
申请号：US15031181
申请日：2013-10-29
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Sheng Li , Jishen Zhao , Jichuan Chang , Parthasarathy Ranganathan , Alistair Veitch , Kevin T. Lim
IPC: G06F12/10
CPC classification number: G06F12/109 , G06F12/10 , G06F2212/1041 , G06F2212/152 , G06F2212/657
Abstract: A method for mapping virtual memory pages to physical memory pages is described. The method includes receiving a mapping of a virtual memory page to multiple physical memory pages, detecting a request for a transaction to be performed on data contained in the multiple physical memory pages, in which the transaction includes a number of data updates, determining which of the number of multiple physical memory pages contains a latest version of the data to be updated by the transaction, updating a physical memory page by performing the transaction within a physical memory page among the multiple physical memory pages that does not contain the latest version of the data, and updating an indication of which of the physical memory pages contains the latest version of the data pertaining to the transaction.
Abstract translation: 描述了将虚拟内存页映射到物理内存页的方法。 该方法包括：接收虚拟存储器页面到多个物理存储器页面的映射，检测对包含在多个物理存储器页面中的数据执行的事务的请求，其中事务包括多个数据更新， 多个物理内存页面的数量包含要由事务更新的数据的最新版本，通过在不包含最新版本的多个物理存储器页面中的物理存储器页面内执行事务来更新物理存储器页面 数据，以及更新物理存储器页面中哪一个包含与交易有关的数据的最新版本的指示。
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公开(公告)号：US10402324B2
公开(公告)日：2019-09-03
申请号：US15032329
申请日：2013-10-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Kevin T. Lim , Sheng Li , Parthasarathy Ranganathan , William C. Hallowell
IPC: G06F12/0802 , G06F13/38
Abstract: According to an example, a processor generates a memory access request and sends the memory access request to a memory module. The processor receives data from the memory module in response to the memory access request when a memory device in the memory module for the memory access request is busy and unable to execute the memory access request.
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公开(公告)号：US10585602B2
公开(公告)日：2020-03-10
申请号：US16011187
申请日：2018-06-18
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Doe Hyun Yoon , Naveen Muralimanohar , Jichuan Chang , Parthasarathy Ranganathan
Abstract: An example method involves receiving, at a first memory node, data to be written at a memory location in the first memory node. The data is received from a device. At the first memory node, old data is read from the memory location, without sending the old data to the device. The data is written to the memory location. The data and the old data are sent from the first memory node to a second memory node to store parity information in the second memory node without the device determining the parity information. The parity information is based on the data stored in the first memory node.
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公开(公告)号：US10152247B2
公开(公告)日：2018-12-11
申请号：US15113824
申请日：2014-01-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Sheng Li , Jishen Zhao , Jichuan Chang , Parthasarathy Ranganathan , Alistair Veitch , Kevin T. Lim , Mark Lillibridge
Abstract: A technique includes acquiring a plurality of write requests from at least one memory controller and logging information associated with the plurality of write requests in persistent storage. The technique includes applying the plurality of write requests atomically as a group to persistent storage.
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