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    Method for Antireflection in Binary and Multi-Level Diffractive Elements
    3.
    发明申请
    Method for Antireflection in Binary and Multi-Level Diffractive Elements 审中-公开
    二元和多层衍射元件中抗反射的方法

    公开(公告)号：US20120057235A1

    公开(公告)日：2012-03-08

    申请号：US13224472

    申请日：2011-09-02

    申请人： Chih-Hao Chang ,  Jose A. Dominguez-Caballero ,  George Barbastathis

    发明人： Chih-Hao Chang ,  Jose A. Dominguez-Caballero ,  George Barbastathis

    IPC分类号： G02B27/42

    CPC分类号： G02B27/42 ,  B82Y20/00 ,  G02B1/11 ,  G02B2207/101 ,  H01L31/02168 ,  Y02E10/50

    摘要： Methods and apparatus for reducing or eliminating reflection at the interface between a binary or multi-level diffractive element and a surrounding medium. A non-planar diffractive surface of a diffractive optical element is coated forming a plurality of nanostructures on the non-planar diffractive surface and, in certain embodiments, on a planar surface as well. The nanostructures are chosen for providing adiabatic refractive index matching at the optical interface between the non-planar diffractive surface and a surrounding medium subject to matching tangential fields at surface discontinuities.

    摘要翻译： 用于减少或消除二级或多级衍射元件与周围介质之间的界面处的反射的方法和装置。 衍射光学元件的非平面衍射表面被涂覆，在非平面衍射表面上形成多个纳米结构，并且在某些实施例中也在平坦表面上形成。 选择纳米结构用于在非平面衍射表面与受到表面不连续处匹配的切向场的周围介质之间的光学界面处提供绝热折射率匹配。

    Connector assembly
    4.
    发明授权
    Connector assembly 有权
    连接器组件

    公开(公告)号：US08935452B2

    公开(公告)日：2015-01-13

    申请号：US13039271

    申请日：2011-03-02

    申请人： Mao-Shun Hsi ,  Yau-Shi Hwang ,  Chih-Hao Chang ,  Po-Nien Wang

    发明人： Mao-Shun Hsi ,  Yau-Shi Hwang ,  Chih-Hao Chang ,  Po-Nien Wang

    IPC分类号： G06F13/00 ,  H01R11/00 ,  H01R12/72

    CPC分类号： H01R12/721

    摘要： A connector assembly for connecting a peripheral device to a computer includes a male connector having a plurality of first connecting pins and a female connector having a plurality of second connecting pins. The plurality of first connecting pins is configured to connect to the peripheral device. The plurality of second connecting pins is configured to connect to the computer. The plurality of second connecting pins is defined on the first circuit board in a second row and a third row. The plurality of second connecting pins comprises a plurality of differential pairs, and each differential pair comprises two differential transmission lines. The two differential transmission lines of each of the plurality of differential pairs are defined on a single row of the second and third rows.

    摘要翻译： 用于将外围设备连接到计算机的连接器组件包括具有多个第一连接引脚的阳连接器和具有多个第二连接引脚的阴连接器。 多个第一连接引脚被配置为连接到外围设备。 多个第二连接销被配置为连接到计算机。 多个第二连接销被限定在第二行和第三行的第一电路板上。 多个第二连接引脚包括多个差分对，并且每个差分对包括两个差分传输线。 多个差分对中的每一个的两个差分传输线被限定在第二行和第三行的单行上。

    Flexible liquid crystal display and flexible fluid display
    5.
    发明授权
    Flexible liquid crystal display and flexible fluid display 有权
    灵活的液晶显示和柔性流体显示

    公开(公告)号：US08804065B2

    公开(公告)日：2014-08-12

    申请号：US13346400

    申请日：2012-01-09

    申请人： Tarng-Shiang Hu ,  Yi-Kai Wang ,  Yu-Jung Peng ,  Tsung-Hua Yang ,  Chih-Hao Chang

    发明人： Tarng-Shiang Hu ,  Yi-Kai Wang ,  Yu-Jung Peng ,  Tsung-Hua Yang ,  Chih-Hao Chang

    IPC分类号： G02F1/1333 ,  G02F1/1339

    CPC分类号： G02B26/005 ,  G02F1/133305 ,  G02F1/133377 ,  G02F1/13394 ,  G02F2001/13396

    摘要： A flexible liquid crystal display and a flexible fluid display are provided. The flexible liquid crystal display includes a first module, a second module, at least two supporting structures and a liquid crystal layer. The second module is disposed correspondingly to the first module. The supporting structures are separately disposed between the first module and the second module and used for abutting the first module and the second module, so that a space between the first module and the second module is divided into a flexible area and two non-flexible areas. The flexible area is located between the two non-flexible areas. The liquid crystal layer is disposed in the flexible area and the two non-flexible areas.

    摘要翻译： 提供柔性液晶显示器和柔性流体显示器。 柔性液晶显示器包括第一模块，第二模块，至少两个支撑结构和液晶层。 第二模块相对于第一模块设置。 所述支撑结构分别设置在所述第一模块和所述第二模块之间，并且用于邻接所述第一模块和所述第二模块，使得所述第一模块和所述第二模块之间的空间被分成柔性区域和两个非柔性区域 。 柔性区域位于两个非柔性区域之间。 液晶层设置在柔性区域和两个非柔性区域中。

    Semiconductor device and method of forming the same
    6.
    发明授权
    Semiconductor device and method of forming the same 有权
    半导体器件及其形成方法

    公开(公告)号：US08759920B2

    公开(公告)日：2014-06-24

    申请号：US13486343

    申请日：2012-06-01

    申请人： Clement Hsingjen Wann ,  Chih-Hao Chang ,  Shou Zen Chang ,  Chih-Hsin Ko ,  Yasutoshi Okuno ,  Andrew Joseph Kelly

    发明人： Clement Hsingjen Wann ,  Chih-Hao Chang ,  Shou Zen Chang ,  Chih-Hsin Ko ,  Yasutoshi Okuno ,  Andrew Joseph Kelly

    IPC分类号： H01L21/70

    CPC分类号： H01L21/823814 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823828 ,  H01L21/823871 ,  H01L23/485 ,  H01L29/6656 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a semiconductor substrate including an active region including a plurality of device regions. The semiconductor device further includes a first device disposed in a first device region of the plurality of device regions, the first device including a first gate structure, first gate spacers disposed on sidewalls of the first gate structure, and first source and drain features. The semiconductor device further includes a second device disposed in a second device region of the plurality of device regions, the second device including a second gate structure, second gate spacers disposed on sidewalls of the second gate structure, and second source and drain features. The second and first source and drain features having a source and drain feature and a contact feature in common. The common contact feature being a self-aligned contact.

    摘要翻译： 公开了一种用于制造半导体器件的半导体器件和方法。 示例性半导体器件包括包括包括多个器件区域的有源区的半导体衬底。 半导体器件还包括设置在多个器件区域的第一器件区域中的第一器件，第一器件包括第一栅极结构，设置在第一栅极结构的侧壁上的第一栅极间隔区以及第一源极和漏极特征。 半导体器件还包括设置在多个器件区域的第二器件区域中的第二器件，第二器件包括第二栅极结构，设置在第二栅极结构的侧壁上的第二栅极间隔区以及第二源极和漏极特征。 第二和第一源极和漏极特征具有源极和漏极特征以及共同的接触特征。 常见的接触特征是自对准接触。

    Display for electronic device
    7.
    发明授权
    Display for electronic device 有权
    显示电子设备

    公开(公告)号：US08727601B2

    公开(公告)日：2014-05-20

    申请号：US13334977

    申请日：2011-12-22

    申请人： Yi-Kai Wang ,  Tsung-Hua Yang ,  Tarng-Shiang Hu ,  Chih-Hao Chang ,  Yu-Jung Peng

    发明人： Yi-Kai Wang ,  Tsung-Hua Yang ,  Tarng-Shiang Hu ,  Chih-Hao Chang ,  Yu-Jung Peng

    IPC分类号： G09F13/08

    CPC分类号： G09F9/30 ,  G09F9/301

    摘要： A display includes a flexible display panel having a back face, two backlight modules disposed on the back face of the display panel and each including a contact end, and an outer casing having two casing panels respectively connected to and supporting the backlight modules oppositely of the display panel. The casing panels are pivotal to move the backlight modules and the display panel between collapsed and non-collapsed positions. In the collapsed position, the display panel is folded, and the backlight modules are parallelly spaced apart. In the non-collapsed position, the display panel is laid flat, the backlight modules coplanarly cover the back face of the display panel, and the contact ends of the backlight modules abut against each other.

    摘要翻译： 显示器包括具有背面的柔性显示面板，设置在显示面板的背面上的两个背光模块，每个包括接触端，以及具有两个壳体面板的外壳，两个外壳面板分别连接到背光模块 显示面板。 壳体面板枢转以将背光模块和显示面板在折叠位置和非折叠位置之间移动。 在折叠位置，显示面板被折叠，并且背光模块平行间隔开。 在未折叠位置，显示面板平坦化，背光模块共面地覆盖显示面板的背面，背光模块的接触端部彼此抵接。

    Power supply circuit
    8.
    发明授权
    Power supply circuit 失效
    电源电路

    公开(公告)号：US08513912B2

    公开(公告)日：2013-08-20

    申请号：US13086239

    申请日：2011-04-13

    申请人： Mao-Shun Hsi ,  Yau-Shi Hwang ,  Chih-Hao Chang ,  Chung-Chih Chou ,  Po-Nien Wang

    发明人： Mao-Shun Hsi ,  Yau-Shi Hwang ,  Chih-Hao Chang ,  Chung-Chih Chou ,  Po-Nien Wang

    IPC分类号： H01M6/50 ,  H02J7/00

    CPC分类号： H02J7/0032

    摘要： A power supply circuit for protecting a battery from current leakage when the battery is not in use includes a control signal input circuit and a switch circuit. The control signal input circuit receives a first control signal from a chip and output a second control signal. The switch circuit receives the second control signal and turns on or off an electronic connection between the battery and the chip. Wherein when the battery is not in use and not being charged by the adaptor, there is a possibility of current leakage from the battery. In such case, the switch circuit turns off the electronic connection between the battery and the chip, and the battery does not provide power to the chip.

    摘要翻译： 当不使用电池时，用于保护电池免受电流泄漏的电源电路包括控制信号输入电路和开关电路。 控制信号输入电路从芯片接收第一控制信号并输出​​第二控制信号。 开关电路接收第二控制信号并打开或关闭电池和芯片之间的电子连接。 其中，当电池未使用并且未被适配器充电时，存在来自电池的电流泄漏的可能性。 在这种情况下，开关电路关闭电池和芯片之间的电子连接，并且电池不向芯片供电。

    Silicide formation and associated devices
    9.
    发明授权
    Silicide formation and associated devices 有权
    硅化物形成和相关设备

    公开(公告)号：US08466027B2

    公开(公告)日：2013-06-18

    申请号：US13227979

    申请日：2011-09-08

    申请人： Hung-Ming Chen ,  Chih-Hao Chang ,  Chih-Hao Yu

    发明人： Hung-Ming Chen ,  Chih-Hao Chang ,  Chih-Hao Yu

    IPC分类号： H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823431 ,  H01L29/401 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7845

    摘要： Improved silicide formation and associated devices are disclosed. An exemplary method includes providing a semiconductor material having spaced source and drain regions therein, forming a gate structure interposed between the source and drain regions, performing a gate replacement process on the gate structure to form a metal gate electrode therein, forming a hard mask layer over the metal gate electrode, forming silicide layers on the respective source and drain regions in the semiconductor material, removing the hard mask layer to expose the metal gate electrode, and forming source and drain contacts, each source and drain contact being conductively coupled to a respective one of the silicide layers.

    摘要翻译： 公开了改进的硅化物形成和相关装置。 一种示例性方法包括提供其间具有间隔的源极和漏极区域的半导体材料，形成插入在源极和漏极区域之间的栅极结构，在栅极结构上执行栅极替换处理以在其中形成金属栅电极，形成硬掩模层 在所述金属栅极电极上，在所述半导体材料中的相应源极和漏极区域上形成硅化物层，去除所述硬掩模层以暴露所述金属栅电极，以及形成源极和漏极接触，每个源极和漏极接触导电耦合到 相应的一个硅化物层。