公开(公告)号：US09806737B2

公开(公告)日：2017-10-31

申请号：US15369777

申请日：2016-12-05

Applicant: IMEC VZW

Inventor： Jan Craninckx ,  Jonathan Borremans ,  Maarten De Bock

IPC: H03M3/00 ,  H03M1/12 ,  H03M1/36 ,  H03M1/00

CPC classification number: H03M3/458 ,  H03M1/00 ,  H03M1/12 ,  H03M1/365 ,  H03M3/30 ,  H03M3/322 ,  H03M3/39 ,  H03M3/496

Abstract: A circuit and a method for converting an analog signal to a digital value representation is disclosed. In one aspect, the circuit includes an incremental sigma-delta analog-to-digital converter (ADC). The circuit further includes a first input line for providing a primary analog signal representing a sensor measurement to the incremental sigma-delta ADC. The circuit further includes a second input line for providing a secondary analog signal to the incremental sigma-delta ADC. The incremental sigma-delta ADC receives the primary and secondary analog signals during a first period (TADC1) and a second period (TADC2), respectively. The circuit further includes a filter configured to weight the digital values in a sequence of digital values output by the incremental sigma-delta ADC, and to output a single digital value representing the sensor measurement.

公开(公告)号：US20170179976A1

公开(公告)日：2017-06-22

申请号：US15369777

申请日：2016-12-05

Applicant: IMEC VZW

Inventor： Jan Craninckx ,  Jonathan Borremans ,  Maarten De Bock

IPC: H03M3/00

CPC classification number: H03M3/458 ,  H03M1/00 ,  H03M1/12 ,  H03M1/365 ,  H03M3/30 ,  H03M3/322 ,  H03M3/39 ,  H03M3/496

Abstract: A circuit and a method for converting an analog signal to a digital value representation is disclosed. In one aspect, the circuit includes an incremental sigma-delta analog-to-digital converter (ADC). The circuit further includes a first input line for providing a primary analog signal representing a sensor measurement to the incremental sigma-delta ADC. The circuit further includes a second input line for providing a secondary analog signal to the incremental sigma-delta ADC. The incremental sigma-delta ADC receives the primary and secondary analog signals during a first period (TADC1) and a second period (TADC2), respectively. The circuit further includes a filter configured to weight the digital values in a sequence of digital values output by the incremental sigma-delta ADC, and to output a single digital value representing the sensor measurement.