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公开(公告)号：US20210192327A1
公开(公告)日：2021-06-24
申请号：US17131783
申请日：2020-12-23
Applicant: Industrial Technology Research Institute
Inventor： Sih-Han Li , Shih-Chieh Chang , Shyh-Shyuan Sheu , Jian-Wei Su , Fu-Cheng Tsai
Abstract: An apparatus and a method for neural network computation are provided. The apparatus for neural network computation includes a first neuron circuit and a second neuron circuit. The first neuron circuit is configured to execute a neural network computation of at least one computing layer with a fixed feature pattern in a neural network algorithm. The second neuron circuit is configured to execute the neural network computation of at least one computing layer with an unfixed feature pattern in the neural network algorithm. The performance of the first neuron circuit is greater than that of the second neuron circuit.
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公开(公告)号：US20210150317A1
公开(公告)日：2021-05-20
申请号：US16809522
申请日：2020-03-04
Applicant: Industrial Technology Research Institute
Inventor： Tuo-Hung Hou , Shyh-Shyuan Sheu , Jeng-Hua Wei , Heng-Yuan Lee , Ming-Hung Wu
Abstract: A neuron circuit and an artificial neural network chip are provided. The neuron circuit includes a memristor and an integrator. The memristor generates a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold. The integrator is connected in parallel to the memristor for receiving and accumulating input pulses transmitted by a previous layer network at different times, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
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公开(公告)号：US10156535B2
公开(公告)日：2018-12-18
申请号：US14961906
申请日：2015-12-08
Applicant: Industrial Technology Research Institute
Inventor： Sih-Han Li , Chih-Sheng Lin , Kuan-Wei Chen , Erh-Hao Chen , Shyh-Shyuan Sheu
IPC: G01N27/12
Abstract: A sensor device and a method of manufacturing the same are provided. The sensor device includes a substrate, a plurality of sensing electrodes, a humidity nanowire sensor, a temperature nanowire sensor, and a gas nanowire sensor. The sensing electrodes are formed on the substrate, and the humidity, the temperature and the gas nanowire sensors are also on the substrate. The humidity nanowire sensor includes an exposed first nanowire sensing region, the temperature nanowire sensor includes a second nanowire sensing region, and the gas nanowire sensor includes a third nanowire sensing region.
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公开(公告)号：US20170115248A1
公开(公告)日：2017-04-27
申请号：US14958856
申请日：2015-12-03
Applicant: Industrial Technology Research Institute
Inventor： Chih-Sheng Lin , Erh-Hao Chen , Sih-Han Li , Kuan-Wei Chen , Shyh-Shyuan Sheu
IPC: G01N27/12
CPC classification number: G01N27/127
Abstract: A gas sensing apparatus including a gas sensor, a gas determining circuit and a gas database is provided. The gas sensor includes at least two nanowire sensors. The gas sensor is configured to sense multiple gases and output a plurality of sensing signals. The gas determining circuit is coupled to the gas sensor. The gas determining circuit is configured to receive the sensing signals and determine types of the gases according to reference data and the sensing signals. The gas database is coupled to the gas determining circuit. The gas database stores the reference data and outputs the reference data to the gas determining circuit. Each of the nanowire sensors includes at least one nanowire. Structural properties of the nanowires are different.
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5.发明授权Resistive memory system, driver circuit thereof and method for setting resistance thereof 有权电阻式存储器系统，其驱动电路及其电阻设定方法公开(公告)号：US09443588B2
公开(公告)日：2016-09-13
申请号：US14749651
申请日：2015-06-25
Applicant: Industrial Technology Research Institute
Inventor： Pei-Ling Tseng , Chia-Chen Kuo , Shyh-Shyuan Sheu , Meng-Fan Chang
CPC classification number: G11C13/0097 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/0061 , G11C13/0069 , G11C2013/0071 , G11C2213/79
Abstract: A resistive memory system, a driver circuit thereof and a method for setting resistances thereof are provided. The resistive memory system includes a memory array, a row selection circuit, a first control circuit and a second control circuit. The memory array has a plurality of resistive memory cells. The row selection circuit is used for activating the resistive memory cells. The first control circuit and the second control circuit are coupled to the resistive memory cells. When each of resistive memory cells is set, the first control circuit and the second control circuit respectively provide a set voltage and a ground voltage to the each of resistive memory cells to form a set current, and the set current is clamped by at least one of the first control circuit and the second control circuit.
Abstract translation: 提供了一种电阻式存储器系统，其驱动电路及其电阻设定方法。 电阻式存储器系统包括存储器阵列，行选择电路，第一控制电路和第二控制电路。 存储器阵列具有多个电阻存储单元。 行选择电路用于激活电阻式存储单元。 第一控制电路和第二控制电路耦合到电阻存储器单元。 当每个电阻性存储器单元被设置时，第一控制电路和第二控制电路分别向每个电阻存储器单元提供一个设定电压和一个接地电压以形成一个设定电流，并且将该设定电流钳位在至少一个 的第一控制电路和第二控制电路。
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Patent Agency Ranking
公开(公告)号：US20140115243A1
公开(公告)日：2014-04-24
申请号：US13974001
申请日：2013-08-22
Applicant: Industrial Technology Research Institute
Inventor： Chih-He Lin , Sih-Han Li , Wen-Pin Lin , Shyh-Shyuan Sheu
IPC: G11C7/10
CPC classification number: G11C7/1072 , G11C13/0002 , G11C13/004 , G11C13/0069 , G11C2013/0047 , G11C2013/0054 , G11C2013/0076
Abstract: A resistive random-access memory device includes a memory array, a read circuit, a write-back logic circuit and a write-back circuit. The read circuit reads the data stored in a selected memory cell and accordingly generates a first control signal. The write-back logic circuit generates a write-back control signal according to the first control signal and a second control signal. The write-back circuit performs a write-back operation on the selected memory cell according to the write-back control signal and a write-back voltage, so as to change a resistance state of the selected memory cell from a low resistance state to a high resistance state, and generates the second control signal according to the resistance state of the selected memory cell.
Abstract translation: 电阻式随机存取存储器件包括存储器阵列，读取电路，回写逻辑电路和回写电路。 读取电路读取存储在所选择的存储器单元中的数据，并且相应地产生第一控制信号。 回写逻辑电路根据第一控制信号和第二控制信号产生回写控制信号。 回写电路根据回写控制信号和回写电压对所选择的存储单元执行写回操作，以将所选存储单元的电阻状态从低电阻状态改变为 并且根据所选存储单元的电阻状态产生第二控制信号。
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公开(公告)号：US11625588B2
公开(公告)日：2023-04-11
申请号：US16809522
申请日：2020-03-04
Applicant: Industrial Technology Research Institute
Inventor： Tuo-Hung Hou , Shyh-Shyuan Sheu , Jeng-Hua Wei , Heng-Yuan Lee , Ming-Hung Wu
Abstract: A neuron circuit and an artificial neural network chip are provided. The neuron circuit includes a memristor and an integrator. The memristor generates a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold. The integrator is connected in parallel to the memristor for receiving and accumulating input pulses transmitted by a previous layer network at different times, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
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公开(公告)号：US20220413801A1
公开(公告)日：2022-12-29
申请号：US17679090
申请日：2022-02-24
Applicant: Industrial Technology Research Institute
Inventor： Jian-Wei Su , Chih-Sheng Lin , Peng-I Mei , Sih-Han Li , Shyh-Shyuan Sheu , Jheng Yang Dai
Abstract: A configurable computing unit within memory including a first input transistor, a first weight transistor, a first resistor, a second input transistor, a second weight transistor, and a second resistor is provided. The first input transistor, the first weight transistor, and the first resistor are coupled in series between a first readout bit line and a common signal line. The first input transistor is coupled to a first input bit line, and the first weight transistor receives a first weight bit. The second input transistor, the second weight transistor, and the second resistor are coupled in series between the first readout bit line and the common signal line. The second input transistor is coupled to a second input bit line, and the second weight transistor receives the second weight bit.
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公开(公告)号：US20190079039A1
公开(公告)日：2019-03-14
申请号：US16178599
申请日：2018-11-02
Applicant: Industrial Technology Research Institute
Inventor： Sih-Han Li , Chih-Sheng Lin , Kuan-Wei Chen , Erh-Hao Chen , Shyh-Shyuan Sheu
IPC: G01N27/12
Abstract: A method of manufacturing a sensor device is provided. In the method, sensing electrodes are formed on a substrate, a sensing material layer is formed on the sensing electrodes. The sensing material layer is etched to form a first nanowire sensing region, a second nanowire sensing region and a third nanowire sensing region respectively between every two sensing electrodes of the sensing electrodes. A dielectric layer is formed to cover the first nanowire sensing region, the second nanowire sensing region and the third nanowire sensing region, and the first nanowire sensing region and the third nanowire sensing region are exposed.
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公开(公告)号：US20180238822A1
公开(公告)日：2018-08-23
申请号：US15955691
申请日：2018-04-18
Applicant: Industrial Technology Research Institute
Inventor： Kuan-Wei Chen , Chih-Sheng Lin , Erh-Hao Chen , Sih-Han Li , Shyh-Shyuan Sheu
IPC: G01N27/12
CPC classification number: G01N27/127 , G01N27/122 , G01N33/0031
Abstract: A gas sensing apparatus including a gas sensor, a gas determining circuit and a gas database is provided. The gas sensor includes at least two nanowire sensors. The gas sensor is configured to sense multiple gases and output a plurality of sensing signals. The gas determining circuit is coupled to the gas sensor. The gas determining circuit is configured to receive the sensing signals and determine types of the gases according to reference data and the sensing signals. The gas database is coupled to the gas determining circuit. The gas database stores the reference data and outputs the reference data to the gas determining circuit. Each of the nanowire sensors includes at least one nanowire. Structural properties of the nanowires are different.
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