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公开(公告)号:US20240332112A1
公开(公告)日:2024-10-03
申请号:US18744108
申请日:2024-06-14
Applicant: Intel Corporation
Inventor: Susmriti Das Mahapatra , Malavarayan Sankarasubramanian , Shenavia Howell , John Harper , Mitul Modi
IPC: H01L23/36 , H01L21/48 , H01L21/50 , H01L21/60 , H01L21/768 , H01L23/00 , H01L23/367 , H01L23/373 , H01L23/42 , H01L23/488
CPC classification number: H01L23/36 , H01L21/4814 , H01L21/50 , H01L21/76838 , H01L23/367 , H01L23/3737 , H01L23/42 , H01L23/488 , H01L23/562 , H01L2021/60135
Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10−6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
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公开(公告)号:US11817369B2
公开(公告)日:2023-11-14
申请号:US16435355
申请日:2019-06-07
Applicant: INTEL CORPORATION
Inventor: Bamidele Daniel Falola , Susmriti Das Mahapatra , Sergio Antonio Chan Arguedas , Peng Li , Amitesh Saha
IPC: H01L23/42 , H01L23/367 , H01L23/373 , H01L23/522 , H01L25/065 , H01L23/00
CPC classification number: H01L23/42 , H01L23/3675 , H01L23/3736 , H01L23/5226 , H01L25/0652 , H01L24/09 , H01L24/17 , H01L2924/15311
Abstract: Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.
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公开(公告)号:US20220102234A1
公开(公告)日:2022-03-31
申请号:US17033080
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Susmriti Das Mahapatra , Malavarayan Sankarasubramanian , Shenavia Howell , John Harper , Mitul Modi
IPC: H01L23/36 , H01L23/488 , H01L23/00 , H01L21/50 , H01L21/768
Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10−6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
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公开(公告)号:US12166004B2
公开(公告)日:2024-12-10
申请号:US16406593
申请日:2019-05-08
Applicant: Intel Corporation
Inventor: Susmriti Das Mahapatra , Bamidele Daniel Falola , Amitesh Saha , Peng Li
IPC: H01L23/00 , H01L23/373
Abstract: Embodiments may relate to a microelectronic package comprising that includes a solder thermal interface material (STIM). The STIM may include indium and a dopant material which may provide a number of benefits to the STIM. The STIM may physically and thermally couple a die and an integrated heat spreader (IHS). Other embodiments may be described or claimed.
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公开(公告)号:US12040246B2
公开(公告)日:2024-07-16
申请号:US17033080
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Susmriti Das Mahapatra , Malavarayan Sankarasubramanian , Shenavia Howell , John Harper , Mitul Modi
IPC: H01L23/367 , H01L21/48 , H01L21/50 , H01L21/768 , H01L23/00 , H01L23/36 , H01L23/373 , H01L23/42 , H01L23/488 , H01L21/60
CPC classification number: H01L23/36 , H01L21/4814 , H01L21/50 , H01L21/76838 , H01L23/367 , H01L23/3737 , H01L23/42 , H01L23/488 , H01L23/562 , H01L2021/60135
Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10−6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
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